- 24 3月, 2021 2 次提交
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由 Lijo Lazar 提交于
Temporarily add smu_pptable module parameter for aldebaran.This is used to force soft PPTable use overriding any VBIOS PPTable. Signed-off-by: NLijo Lazar <Lijo.Lazar@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Feifei Xu 提交于
Add 0x7408,0x740C,0x740F in pciidlist. Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 3月, 2021 2 次提交
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由 Takashi Iwai 提交于
There seem devices that don't work with the aux channel backlight control. For allowing such users to test with the other backlight control method, provide a new module option, aux_backlight, to specify enabling or disabling the aux backport support explicitly. As default, the aux support is detected by the hardware capability. v2: make the backlight option generic in case we add future backlight types (Alex) BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1180749 BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1438Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This has been stable for a while. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 2月, 2021 3 次提交
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由 Alex Deucher 提交于
So mesa can check when to query the kernel vs use hardcoded codec bandwidth data. Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why] This option shall be opt-in by default since it is a temporary solution until long term solution is agreed upon which may require userspace interface changes. This feature give the user a seamless experience when freesync aware programs (media players for instance) switches to a compatible freesync mode when playing videos. Enabling this feature also have the potential side effect of causing higher power consumption due to running a mode with lower resolution and base clock frequency with the highest base clock supported on the monitor as per its advertised modes. There has been precedent of manufacturing modes in the kernel. In AMDGPU, the existing usage are for common modes and scaling modes. Other driver have a similar approach as well. [How] Adds a module parameter to enable freesync video mode modeset optimization. Enabling this mode allows the driver to skip a full modeset when a freesync compatible mode is requested by the userspace. This parameter will also add some additional modes that are within the connected monitor's VRR range corresponding to common video modes, which media players can use for a seamless experience while making use of freesync. Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NShashank Sharma <shashank.sharma@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dennis Li 提交于
To ensure user has a constant of VRAM accessible in run-time, driver reserves limit backup pages when init, and return ones when bad pages retired, to keep no change of unused memory size. v2: refine codes to calculate badpags threshold Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NDennis Li <Dennis.Li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 2月, 2021 1 次提交
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由 Prike Liang 提交于
In the shutdown and poweroff opt on the s0i3 system we still need un-gate the gfx clock gating and power gating before destory amdgpu device. Fixes: 628c36d7 ("drm/amdgpu: update amdgpu device suspend/resume sequence for s0i3 support") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1499Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 2月, 2021 4 次提交
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由 Alex Deucher 提交于
If device suspend fails when we attempt to runtime suspend, reset the runpm flag. Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are already called in amdgpu_device_suspend/resume which are already called in the same functions. Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This allows us to use generic PCI reset mechanisms (FLR, SBR) as a reset mechanism to verify that the generic PCI reset mechanisms are working properly. Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
Enable DCS V1: Enable Async DCS. V2: Add the ppfeaturemask bit to enable from the modprobe parameter. V3: 1. add the flag to skip APU support. 2. remove the hunk for workload selection since it doesn't impact the function. Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 2月, 2021 1 次提交
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由 Ori Messinger 提交于
The purpose of this patch is to add a missing device ID for Sienna Cichlid. The missing ID "0x73A1" is now added to the "amdgpu_drv.c" file. Signed-off-by: NOri Messinger <Ori.Messinger@amd.com> Reviewed-by: NKent Russell <kent.russell@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 1月, 2021 4 次提交
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由 mengwang 提交于
add DID 0x164C into pciidlist under CHIP_RENOIR family. Signed-off-by: Nmengwang <mengbing.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
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由 Prike Liang 提交于
Add green_sardine PCI id support and map it to renoir asic type. v2: add apu flag Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
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由 mengwang 提交于
add DID 0x164C into pciidlist under CHIP_RENOIR family. Signed-off-by: Nmengwang <mengbing.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
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由 Prike Liang 提交于
Add green_sardine PCI id support and map it to renoir asic type. v2: add apu flag Signed-off-by: NPrike Liang <Prike.Liang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
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- 13 1月, 2021 1 次提交
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由 Thomas Zimmermann 提交于
Using struct drm_device.pdev is deprecated. Convert amdgpu to struct drm_device.dev. No functional changes. v3: * rebased Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de> Acked-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210107080748.4768-3-tzimmermann@suse.de
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- 16 12月, 2020 3 次提交
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由 Alex Deucher 提交于
Simplify the logic in the runtime resume handling for atpx Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
The platform knows it's doing d3cold. Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
In preparation for systems that support d3cold on dGPUs independent of PX/HG. No functional change intended. Acked-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 11月, 2020 1 次提交
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由 Likun Gao 提交于
Default runtime logic not changed. Provide an alternative runtime method. (set 1 to use BACO; 2 to use BAMACO) When set reset_method to 4, it will use BACO or BAMACO for gpu reset, according to runpm value. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 11月, 2020 3 次提交
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由 Tao Zhou 提交于
Add device id for dimgrey_cavefish. Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NJiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
add device ID for navy_flounder v2: squash in updates Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Luben Tuikov 提交于
Fix a missing prototype warning for function amdgpu_info_ioctl(), drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:482:5: warning: no previous prototype for 'amdgpu_info_ioctl' [-Wmissing-prototypes] Signed-off-by: NLuben Tuikov <luben.tuikov@amd.com> Reported-by: Nkernel test robot <lkp@intel.com> Reviewed-by: NSouptick Joarder <jrdr.linux@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110051548.685725-1-luben.tuikov@amd.com
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- 17 11月, 2020 2 次提交
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由 Alex Deucher 提交于
This has been stable for a while. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This has been stable for a while. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 11月, 2020 1 次提交
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由 Luben Tuikov 提交于
Make the definition of struct drm_driver a constant, to follow the latest developments in the DRM layer. Signed-off-by: NLuben Tuikov <luben.tuikov@amd.com> [danvet: Rebase onto devm_drm_dev_alloc patch and drop the freesync ioctl line again that escaped from internal trees.] Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20201104100425.1922351-6-daniel.vetter@ffwll.ch
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- 05 11月, 2020 2 次提交
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由 Kevin Wang 提交于
the vega20 isn't supported swsmu. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Deepak R Varma 提交于
Initializing global variable to 0 or NULL is not necessary and should be avoided. Issue reported by checkpatch script as: ERROR: do not initialise globals to 0 (or NULL). Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NDeepak R Varma <mh12gx2825@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 11月, 2020 1 次提交
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由 Deepak R Varma 提交于
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch corrects issues for various amdgpu_*.c files for this driver. Issue reported by checkpatch script. Signed-off-by: NDeepak R Varma <mh12gx2825@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 10月, 2020 1 次提交
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由 Evan Quan 提交于
With this, for multiple monitors in sync(e.g. with the same model), mclk switching will be allowed. That helps saving some idle power on some ASICs(e.g. Polaris). Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 27 10月, 2020 1 次提交
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由 Tianci.Yin 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 10月, 2020 1 次提交
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由 Tianci.Yin 提交于
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 10月, 2020 1 次提交
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由 Huang Rui 提交于
Add Van Gogh PCI id support. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 9月, 2020 1 次提交
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由 Alex Deucher 提交于
This allows us to set different defaults on a per asic basis. This way we can enable noretry on dGPUs where it can increase performance in certain cases and disable it on chips where it can be problematic. For now the default is 0 for all asics, but we may want to try and enable it again for newer dGPUs. Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 9月, 2020 1 次提交
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由 Thomas Zimmermann 提交于
GEM object functions deprecate several similar callback interfaces in struct drm_driver. This patch replaces the per-driver callbacks with per-instance callbacks in amdgpu. The only exception is gem_prime_mmap, which is non-trivial to convert. v3: * remove amdgpu_object.c from patch (Christian) v2: * move object-function instance to amdgpu_gem.c (Christian) * set callbacks in amdgpu_gem_object_create() (Christian) Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de> Reviewed-by: NChristian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200923102159.24084-2-tzimmermann@suse.de
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- 21 9月, 2020 1 次提交
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由 Luben Tuikov 提交于
Convert to using devm_drm_dev_alloc(), as drm_dev_init() is going away. v2: Remove drm_dev_put() since a) devres doesn't do refcounting, see Documentation/driver-api/driver-model/devres.rst, Section 4, paragraph 1; and since b) devres acts as garbage collector when the DRM device's parent's devres "action" callback is called to free the container device (amdgpu_device), which embeds the DRM dev. Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NLuben Tuikov <luben.tuikov@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200918132505.2316382-4-daniel.vetter@ffwll.ch
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- 18 9月, 2020 2 次提交
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由 Alex Deucher 提交于
Navi12 has worked fine for a while now. Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
Add device ID for sienna_cichlid. v2: squash in additional device ids. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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