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  1. 08 11月, 2022 5 次提交
    • O
      !219 【OLK-5.10】RDMA/hns: Support for bonding · 866b2e97
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @hellotcc 
 
This PR add support for bonding on hns roce.
**ISSUE**
https://gitee.com/openeuler/kernel/issues/I5Z6L8
**TEST**
related test log has been attached to the issue 
 
Link:https://gitee.com/openeuler/kernel/pulls/219 
Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
Reviewed-by: Yue Haibing <yuehaibing@huawei.com> 
Reviewed-by: Ling Mingqiang <lingmingqiang@huawei.com> 
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
      866b2e97
    • O
      !224 ROH: Support hns roh device init and adapt roh mac type · bcd1ac7c
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @chenke1978 
 
[Description]
The ROH module driver consists of the ROH Core and ROH DRV
modules, which work with hardware to implement communication
between nodes through HCCS packets.
ROH Core is a protocol stack of the ROH architecture. It provides
related services for upper layers by invoking operation interfaces
provided by the ROH DRV.
The ROH DRV implements the lower layer functions of the ROH
featureand provides a series of interfaces for operating hardware
for the ROH Core. 

This PR contains the following contents:
1. Support the ROH device ID and complete the initialization
of the HNS ROH device in ROH MAC type.
2. Provide the initialization of the ROH cmdq command
channel to enable the ROH device to communicate with the IMP.
3. net: hns3: add support for roh ras/rest is userd to prepare
for the roh next patch.

[Testing]
kernel options:
CONFIG_ROH=m
CONFIG_ROH_HNS=m

Test passed with below step:
1. Using a hardware environment that supports ROH, run lspci to check the
pci device info , and you can find the device id belonging to ROH:
lspci
29:00.0 Class 0200: Device 19e5:a22c (rev 32)
2. Load the following modules in sequence:
insmod hnae3.ko
insmod hclge.ko
insmod hns3.ko
insmod roh_core.ko
insmod hns-roh-v1.ko
There is no error when roh ko is installed, and you will get a
success message: "hns3 0000:29:00.0: roh driver init success"
3. Check the sysfs file and confirm that the hns3_0 device file
has been generated in the /sys/class/roh/ directory:
ls /sys/class/roh/
hns3_0
4. Confirm that the current pci device is in ROH MAC type
cat /sys/kernel/debug/hns3/0000:29:00.0/reg/mac | grep type
type: ROH
5. In ROH mode, run the ifconfig command to confirm that the
network device has been generated normally
6. Uninstall roh_core.ko & hns-roh-v1.ko without any errors 
 
Link:https://gitee.com/openeuler/kernel/pulls/224 
Reviewed-by: Ling Mingqiang <lingmingqiang@huawei.com> 
Reviewed-by: Yue Haibing <yuehaibing@huawei.com> 
Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com>
      bcd1ac7c
    • O
      !165 ascend agent smmu: an implementation of ARM SMMUv3 ATOS feature · 4821226b
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @yezengruan 
 
To support HCCS bus using in Ascend series accelerators, the SMMU ATOS
(a software-accessible Address Translation Operations facility) feature
is enabled for a special SMMU aka Agent SMMU in the Ascend accelerator.

In the VM scenario, the hypervisor creates Stage1 page table for the
Agent SMMU. The Agent SMMU provides an interface for components in
accelerator to translate addresses from IPA to PA. This allows the
components to DMA on the HCCS bus using PA.

The origin SMMU ATOS feature only support translation of only a single
group of addresses at a time. Ascend Agent SMMUs use the IMPLEMENTATION
DEFINED region to implement translation of max 32 groups of addresses at
the same time which can greatly improve the efficiency. 
 
Link:https://gitee.com/openeuler/kernel/pulls/165 
Reviewed-by: Hanjun Guo <guohanjun@huawei.com> 
Reviewed-by: Kevin Zhu <zhukeqian1@huawei.com> 
Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
      4821226b
    • B
      ascend agent smmu: an implementation of ARM SMMUv3 ATOS feature · 3bf501c8
      由 Binfeng Wu 提交于 
      ascend inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5JSWJ
CVE: NA

-------------------------------------------------

To support HCCS bus using in Ascend series accelerators, the SMMU ATOS
(a software-accessible Address Translation Operations facility) feature
is enabled for a special SMMU aka Agent SMMU in the Ascend accelerator.

In the VM scenario, the hypervisor creates Stage1 page table for the
Agent SMMU. The Agent SMMU provides an interface for components in
accelerator to translate addresses from IPA to PA. This allows the
components to DMA on the HCCS bus using PA.

The origin SMMU ATOS feature only support translation of only a single
group of addresses at a time. Ascend Agent SMMUs use the IMPLEMENTATION
DEFINED region to implement translation of max 32 groups of addresses at
the same time which can greatly improve the efficiency.
Reviewed-by: NYingtai Xie <xieyingtai@huawei.com>
Reviewed-by: NXiaoyang Xu <xuxiaoyang2@huawei.com>
Signed-off-by: NBinfeng Wu <wubinfeng@huawei.com>
Reviewed-by: NWeilong Chen <chenweilong@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
Signed-off-by: Nyezengruan <yezengruan@huawei.com>
      3bf501c8
    • K
      roh/hns3: Add ROH cmdq interface support · 1cb9fff3
      由 Ke Chen 提交于 
      driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5WKYW

-----------------------------------------------------------------------

Each ROH device has its own cmdq interface, which includes
send queue CSQ and receive queue CRQ. These commands are
used to obtain the resources of the ROH device from IMP and
implement related configurations.

This patch adds the support of IMP command interface to the
ROH driver, include:
1. initialize the roh command queue resource
2. manage the roh command queue descriptors
3. provide the cmdq send operation APIs
Signed-off-by: NKe Chen <chenke54@huawei.com>
Reviewed-by: NGang Zhang <gang.zhang@huawei.com>
Reviewed-by: NYefeng Yan <yanyefeng@huawei.com>
Reviewed-by: NJingchao Dai <daijingchao1@huawei.com>
Reviewed-by: NJian Shen <shenjian15@huawei.com>
      1cb9fff3
  3. 07 11月, 2022 17 次提交
  5. 05 11月, 2022 1 次提交
  7. 04 11月, 2022 5 次提交
    • O
      !85 [OLK-5.10] x86/cpufeatures: Add Zhaoxin feature bits · ef16aa34
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @leoliu-oc 
 
The patch is to add Zhaoxin feature bits on Zhaoxin CPUs.

### Issue
[#I5NYQF](https://gitee.com/openeuler/kernel/issues/I5NYQF)

### Test
Build and boot kernel with this patch. Check various features in `lscpu` or `/proc/cpuinfo`.
```shell
# cat /proc/cpuinfo | grep flags
# or
# lscpu | grep flags
# you will see new Zhaoxin feature flags
# for example, rng2/rng2_en/phe2/phe2_en/...
# +#define X86_FEATURE_RNG2		(5*32+22) /* 2nd generation of RNG present */
# +#define X86_FEATURE_RNG2_EN    (5*32+23) /* 2nd generation of RNG enabled */
# +#define X86_FEATURE_PHE2		(5*32+25) /* SHA384 and SHA 512 present */
# +#define X86_FEATURE_PHE2_EN    (5*32+26) /* SHA384 and SHA 512 enabled */

Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq monitor vmx smx est tm2 ssse3 cx16 xtpr pcid sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand rng rng_en ccs ccs_en ace ace_en ace2 phe phe_en pmm pmm_en parallax parallax_en rng2 rng2_en phe2 phe2_en xmodx xmodx_en lahf_lm abm 3dnowprefetch invpcid_single tpr_shadow vnmi ept vpid fsgsbase tsc_adjust bmi1 smep bmi2 invpcid rdseed adx xsaveopt dtherm umip arch_capabilities
```

### Known Issue
N/A

### Default config change
N/A 
 
Link:https://gitee.com/openeuler/kernel/pulls/85 
Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
      ef16aa34
    • O
      !166 SPR: KVM: Add new instructions, Bus Lock Debug Exception, Bus Lock VM... · 9cb12b91
      由 openeuler-ci-bot 提交于 
      !166 SPR: KVM: Add new instructions, Bus Lock Debug Exception, Bus Lock VM exit and Notify VM exit support

Merge Pull Request from: @allen-shi 
 
This PR is to add new instructions(AVX_VNNI and AVX512_FP16), Bus Lock Debug Exception, Bus Lock VM exit and Notify VM exit support, and kabi is not changed based on OpenEuler-22.03-LTS kabi whitelist.

 **Intel-Kernel Issue** 
[#I5O6WB](https://gitee.com/openeuler/intel-kernel/issues/I5O6WB)
[#I5RJCB](https://gitee.com/openeuler/intel-kernel/issues/I5RJCB)
[#I5PAJ5](https://gitee.com/openeuler/intel-kernel/issues/I5PAJ5)
[#I5RHW7](https://gitee.com/openeuler/intel-kernel/issues/I5RHW7)

 **Test** 
1. Built and run the kernel successfully on OpenEuler 22.03 LTS.
2. SPR new instructions feature(AVX_VNNI and AVX512_FP16) is supported on guests.
3. Bus Lock Debug Exception feature is supported on guests. 
4. Bus Lock VM Exit feature is supported.
5. Notify VM Exit feature is supported. 

 **Known Issue** 
N/A

 **Default config change** 
N/A 
 
Link:https://gitee.com/openeuler/kernel/pulls/166 
Reviewed-by: Kevin Zhu <zhukeqian1@huawei.com> 
Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
Reviewed-by: Jason Zeng <jason.zeng@intel.com> 
Reviewed-by: Chen Wei <chenwei@xfusion.com> 
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
      9cb12b91
    • L
      x86/cpufeatures: Add Zhaoxin feature bits · cf891721
      由 LeoLiu-oc 提交于 
      zhaoxin inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5NYQF
CVE: NA

--------------------------------------------

Add Zhaoxin feature bits on Zhaoxin CPUs.
Signed-off-by: NLeoLiu-oc <LeoLiu-oc@zhaoxin.com>
      cf891721
    • O
      !171 SPR: HBM retry_rd_err_log support · 4ef5a878
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @youquan_song 
 
[Description]​
https://gitee.com/openeuler/intel-kernel/issues/I5V3SJ

An HBM memory channel is divided into two pseudo channels. Each
pseudo channel has its own retry_rd_err_log registers. Retrieve and
print retry_rd_err_log registers of the HBM pseudo channel if the
memory error is from HBM.

14646de4 EDAC/skx_common: Add ChipSelect ADXL component
acd4cf68 EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBM
d5f5e499 EDAC/i10nm: Print an extra register set of retry_rd_err_log

[Testing]
1.Add kernel options in grub: efi=nosoftreserve i10nm_edac.retry_rd_err_log=1
2.numactl -H
node distances:
node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0: 10 12 12 12 21 21 21 21 13 14 14 14 23 23 23 23
1: 12 10 12 12 21 21 21 21 14 13 14 14 23 23 23 23
2: 12 12 10 12 21 21 21 21 14 14 13 14 23 23 23 23
3: 12 12 12 10 21 21 21 21 14 14 14 13 23 23 23 23
4: 21 21 21 21 10 12 12 12 23 23 23 23 13 14 14 14
5: 21 21 21 21 12 10 12 12 23 23 23 23 14 13 14 14
6: 21 21 21 21 12 12 10 12 23 23 23 23 14 14 13 14
7: 21 21 21 21 12 12 12 10 23 23 23 23 14 14 14 13
8: 13 14 14 14 23 23 23 23 10 14 14 14 23 23 23 23
9: 14 13 14 14 23 23 23 23 14 10 14 14 23 23 23 23
10: 14 14 13 14 23 23 23 23 14 14 10 14 23 23 23 23
11: 14 14 14 13 23 23 23 23 14 14 14 10 23 23 23 23
12: 23 23 23 23 13 14 14 14 23 23 23 23 10 14 14 14
13: 23 23 23 23 14 13 14 14 23 23 23 23 14 10 14 14
14: 23 23 23 23 14 14 13 14 23 23 23 23 14 14 10 14
15: 23 23 23 23 14 14 14 13 23 23 23 23 14 14 14 10
3. #modprobe einj
4. git clone https://git.kernel.org/pub/scm/linux/kernel/git/aegl/ras-tools.git, build it
5. # numactl --cpunodebind=0 --membind=13 /home/ras-tools/cmcistorm 1
0: vaddr = 0x130d490 paddr = d87ff42490
6. #dmesg: output retry_rd_err_log registers value.

[83086.997090] EDAC MC29: 0 CE memory read error on CPU_SrcID#1_HBMC#9_Chan#1 (channel:1 page:0xd87ff42 offset:0x480 grain:32 syndrome:0x0 - err_code:0x0000:0x009f SystemAddress:0xd87ff42480 ProcessorSocketId:0x1 MemoryControllerId:0x9 ChannelAddress:0x7ffe8480 ChannelId:0x1 RankAddress:0x3fff4240 PhysicalRankId:0x0 Row:0x7ffe Column:0x14 Bank:0x0 BankGroup:0x0 ChipSelect:0x2 ChipId:0x1 retry_rd_err_log[08928208 00000000 0000000000010000 00500081 80007ffe 000000d87ff42480] correrrcnt[0001 0000 0001 0000 0000 0000 0000 0000]) 
 
Link:https://gitee.com/openeuler/kernel/pulls/171 
Reviewed-by: Chen Wei <chenwei@xfusion.com> 
Reviewed-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> 
Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
Reviewed-by: Jun Tian <jun.j.tian@intel.com> 
Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>
      4ef5a878
    • O
      !210 x86/tsc: use topology_max_packages() in tsc watchdog check · 425c0a7b
      由 openeuler-ci-bot 提交于 
      Merge Pull Request from: @juntianlinux 
 
[Description]​
Temporary fix for #I5U037

Occasionally TSC clocksource is wrongly judged as unstable watchdog like 'jiffies', HPET on some platforms like Skylake 4S. 

For normal cases, we can use nr_online_nodes <= 4 as a quick workaround for this issue. However, there are many cases that 'nr_online_nodes' could have issue. Intel is still working on a formal fix, the patch in this PR is a more general fix but still have open under discussion.

Generally, there are some corner cases, but we can use this for a temporary fix to this issue. In next step, we need to update this fix after upstream merging the final solution.

 
 
Link:https://gitee.com/openeuler/kernel/pulls/210 
Reviewed-by: Jiao Fenfang <jiaofenfang@uniontech.com> 
Reviewed-by: Chen Wei <chenwei@xfusion.com> 
Reviewed-by: Xibo.Wang <wangxb12@chinatelecom.cn> 
Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com>
      425c0a7b
  9. 03 11月, 2022 12 次提交