Sometimes an extraneous "---help---" follows "help". That is probably a
copy&paste error stemming from their inconsistent use. Remove those.
Signed-off-by: NLubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20190822093126.594013-1-lkundrak@v3.skSigned-off-by: NStephen Boyd <sboyd@kernel.org>

The return value of of_parse_clkspec() is peculiar. If the function is
called with a NULL argument for 'name' it will return -ENOENT, but if
it's called with a non-NULL argument for 'name' it will return -EINVAL.
This peculiarity is documented by commit 5c56dfe6 ("clk: Add comment
about __of_clk_get_by_name() error values").

Let's further document this function so that it's clear what the return
value is and how to use the arguments to parse clk specifiers.

Cc: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20190826212042.48642-1-sboyd@kernel.orgReviewed-by: NPhil Edworthy <phil.edworthy@renesas.com>

An extra 'for' word is grammatically incorrect in the comment
'verifying ops for multi-parent clks'. This commit removes
this extra for word.
Signed-off-by: NRishi Gupta <gupt21@gmail.com>
Link: https://lkml.kernel.org/r/1566023759-7880-1-git-send-email-gupt21@gmail.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>

Misspelling 'prohibited' is quite common in the real world, although
surprisingly not so much in the Linux Kernel.  In addition to fixing the
typo we may as well add it to the spelling checker.

Also adding the present participle (prohibiting).

Link: http://lkml.kernel.org/r/20190514153341.22540-1-chris.paterson2@renesas.com
Fixes: 5bf2fbbe ("clk: renesas: cpg-mssr: Add r8a77470 support")
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Without this we were getting errors like:

In file included from drivers/clk/clkdev.c:22:0:
drivers/clk/clk.h:36:23: error: static declaration of '__clk_get_hw' follows non-static declaration
include/linux/clk-provider.h:808:16: note: previous declaration of '__clk_get_hw' was here

Fixes: 59fcdce4 ("clk: Remove ifdef for COMMON_CLK in clk-provider.h")
fixes: 73e0e496 ("clkdev: Always allocate a struct clk and call __clk_get() w/ CCF")
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

sprd_clk_regmap_init() doesn't always return success, adding check
for its return value should make the code more strong.
Signed-off-by: NChunyan Zhang <zhang.chunyan@linaro.org>
Reviewed-by: NBaolin Wang <baolin.wang@linaro.org>
[sboyd@kernel.org: Add a missing int ret]
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Adds a driver for the Si5341 and Si5340 chips. The driver does not fully
support all features of these chips, but allows the chip to be used
without any support from the "clockbuilder pro" software.

If the chip is preprogrammed, that is, you bought one with some defaults
burned in, or you programmed the NVM in some way, the driver will just
take over the current settings and only change them on demand. Otherwise
the input must be a fixed XTAL in its most basic configuration (no
predividers, no feedback, etc.).

The driver supports dynamic changes of multisynth, output dividers and
enabling or powering down outputs and multisynths.
Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl>
[sboyd@kernel.org: Mark some things static, use BIT_ULL for big bits and
ULL for big constants]
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

The Si544 supports changing frequencies "on the fly" when the change is
less than 950 ppm from the current center frequency. The driver now
uses the small adjustment routine for implementing this.
Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add a driver for the gated clock controller found on MIPS based BCM63XX
SoCs.
Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
[sboyd@kernel.org: Remove module.h include and associated things for a
non-modular driver, add static on data tables, drop of_match_ptr()
usage, fix spdx tag to be a C++ style comment]
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Use at91 specific functions to free all resources in case of error.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Improve error path for sama5d4 sck registration.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Remove unnecessary line.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Improve error path for sam9x5 slow clock registration.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add support to free slow clock oscillator resources.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add support to free slow rc oscillator resources.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add support to free slow oscillator resources.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

RK809 and RK817 are power management IC chips for multimedia products.
most of their functions and registers are same, including the clkout
funciton.
Signed-off-by: NTony Xie <tony.xie@rock-chips.com>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

ROHM BD70528 is an ultra low power PMIC with similar 32K clk as
bd718x7. Only difference (from clk perspective) is register address.
Add support for controlling BD70528 clk using bd718x7 driver.
Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Split the bd718x7.h to ROHM common and bd718x7 specific parts
so that we do not need to add same things in every new ROHM
PMIC header. Please note that this change requires changes also
in bd718x7 sub-device drivers for regulators and clk.
Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Acked-by: NMark Brown <broonie@kernel.org>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Export the hdmiphy clock mux via the newly added clock-id.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NJustin Swartz <justin.swartz@risingedge.co.za>

The watchdog pclk is controlled from the secure GRF but we still
want to mention it explicitly to not use arbitary parent clocks
in the devicetree wdt node, so add a SGRF_GATE for it.
Suggested-by: NLeonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

Add support for SAM9X60's slow clock.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Different IPs uses different bit offsets in registers for the same
functionality, thus adapt the driver to support this.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

The slow clock of SAMA5D4 has no bypass support thus remove it.
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

The function devm_regmap_init_mmio() wouldn't return NULL pointer for
now, so only need to ensure the return value is not an error code.
Signed-off-by: NChunyan Zhang <zhang.chunyan@linaro.org>
Reviewed-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

devm_ioremap_resources() automatically requests resources and devm_ wrappers
do better error handling and unmapping of the I/O region when needed,
that would make drivers more clean and simple.
Signed-off-by: NChunyan Zhang <zhang.chunyan@linaro.org>
Reviewed-by: NBaolin Wang <baolin.wang@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Switch over to the more modern style of registering parents and simplify
the code in the process.
Suggested-by: NStephen Boyd <sboyd@kernel.org>
Signed-off-by: NCharles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

It turns out that this PLL is not used on Tegra210, so there's no need
to enable it via the init table. Remove the init table entry for this
PLL to avoid it getting enabled at boot time. If the bootloader enabled
it and forgot to turn it off, the common clock framework will now know
to disable it because it is unused.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

A PLL in IDDQ doesn't work, whether it's enabled or not. This is not a
configuration that makes sense, so warn about it.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

There is no need to warn if the reference PLL is enabled with the
correct defaults. Only warn if the boot values don't match the defaults.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Full-speed and low-speed USB devices do not work with Tegra210
platforms because of incorrect PLLU/PLLU_OUT1 clock settings.

When full-speed device is connected:
[   14.059886] usb 1-3: new full-speed USB device number 2 using tegra-xusb
[   14.196295] usb 1-3: device descriptor read/64, error -71
[   14.436311] usb 1-3: device descriptor read/64, error -71
[   14.675749] usb 1-3: new full-speed USB device number 3 using tegra-xusb
[   14.812335] usb 1-3: device descriptor read/64, error -71
[   15.052316] usb 1-3: device descriptor read/64, error -71
[   15.164799] usb usb1-port3: attempt power cycle

When low-speed device is connected:
[   37.610949] usb usb1-port3: Cannot enable. Maybe the USB cable is bad?
[   38.557376] usb usb1-port3: Cannot enable. Maybe the USB cable is bad?
[   38.564977] usb usb1-port3: attempt power cycle

This commit fixes the issue by:
 1. initializing PLLU_OUT1 before initializing XUSB_FS_SRC clock
    because PLLU_OUT1 is parent of XUSB_FS_SRC.
 2. changing PLLU post-divider to /2 (DIVP=1) according to Technical
    Reference Manual.

Fixes: e745f992 ("clk: tegra: Rework pll_u")
Signed-off-by: NJC Kuo <jckuo@nvidia.com>
Acked-By: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

As 'clk-raspberrypi' depends on RPi's firmware interface, which might be
configured as a module, the cpu clock might not be available for the
cpufreq driver during it's init process. So we register the
'raspberrypi-cpufreq' platform device after the probe sequence succeeds.
Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Raspberry Pi's firmware offers an interface though which update it's
clock's frequencies. This is specially useful in order to change the CPU
clock (pllb_arm) which is 'owned' by the firmware and we're unable to
scale using the register interface provided by clk-bcm2835.
Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Raspberry Pi's firmware controls this pll, we should use the firmware
interface to access it.
Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Add clockgen support and configuration for NXP SoC lx2160a
with compatible property as "fsl,lx2160a-clockgen".
Signed-off-by: NTang Yuantian <andy.tang@nxp.com>
Signed-off-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: NVabhav Sharma <vabhav.sharma@nxp.com>
Acked-by: NScott Wood <oss@buserror.net>
Acked-by: NStephen Boyd <sboyd@kernel.org>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

We have a dedicated pointer for that, so use it. Much easier to read and
less computation involved.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

Clang produces the following warning

drivers/clk/qcom/gcc-msm8996.c:133:32: warning: unused variable
'gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div_map' [-Wunused-const-variable]
static const struct
parent_map gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div_map[] =
{ ^drivers/clk/qcom/gcc-msm8996.c:141:27: warning: unused variable
'gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div' [-Wunused-const-variable] static
const char * const gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div[] = { ^
drivers/clk/qcom/gcc-msm8996.c:187:32: warning: unused variable
'gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div_map'
[-Wunused-const-variable] static const struct parent_map
gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div_map[] = { ^
drivers/clk/qcom/gcc-msm8996.c:197:27: warning: unused variable
'gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div'
[-Wunused-const-variable] static const char * const
gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div[] = {

It looks like these were never used.

Fixes: b1e010c0 ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Cc: clang-built-linux@googlegroups.com
Link: https://github.com/ClangBuiltLinux/linux/issues/518Suggested-by: NNathan Chancellor <natechancellor@gmail.com>
Signed-off-by: NNathan Huckleberry <nhuck@google.com>
Reviewed-by: NNathan Chancellor <natechancellor@gmail.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

These functions are not called anywhere anymore, they can safely be
removed.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

The Low-Power Mode, when enabled, will make the "wait" MIPS instruction
suspend the system.

This is not really clock-related, but this bit happens to be in the
register set of the CGU.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>

The cgu.h has structures that contain 'clk_onecell_data' and 'clk_hw'
structures (no pointers), so the <linux/clk-provider.h> header should be
included.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
[sboyd@kernel.org: Drop removal of includes in drivers]
Signed-off-by: NStephen Boyd <sboyd@kernel.org>