1. 14 5月, 2011 1 次提交
  2. 11 5月, 2011 5 次提交
  3. 23 3月, 2011 1 次提交
  4. 06 3月, 2011 1 次提交
  5. 08 2月, 2011 1 次提交
  6. 28 1月, 2011 1 次提交
  7. 19 1月, 2011 2 次提交
  8. 13 1月, 2011 1 次提交
  9. 12 1月, 2011 5 次提交
  10. 18 12月, 2010 1 次提交
  11. 15 12月, 2010 1 次提交
    • Y
      drm/i915: Add self-refresh support on Sandybridge · 1398261a
      Yuanhan Liu 提交于
      Add the support of memory self-refresh on Sandybridge, which is now
      support 3 levels of watermarks and the source of the latency values
      for watermarks has changed.
      
      On Sandybridge, the LP0 WM value is not hardcoded any more. All the
      latency value is now should be extracted from MCHBAR SSKPD register.
      And the MCHBAR base address is changed, too.
      
      For the WM values, if any calculated watermark values is larger than
      the maximum value that can be programmed into the associated watermark
      register, that watermark must be disabled.
      Signed-off-by: NYuanhan Liu <yuanhan.liu@linux.intel.com>
      [ickle: remove duplicate compute routines and fixup for checkpatch]
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      1398261a
  12. 06 12月, 2010 1 次提交
  13. 05 12月, 2010 1 次提交
  14. 25 11月, 2010 1 次提交
  15. 24 11月, 2010 3 次提交
  16. 23 11月, 2010 1 次提交
  17. 22 11月, 2010 2 次提交
  18. 11 11月, 2010 1 次提交
  19. 01 11月, 2010 1 次提交
  20. 30 10月, 2010 3 次提交
  21. 29 10月, 2010 1 次提交
    • C
      drm/i915: Only enforce fence limits inside the GTT. · a00b10c3
      Chris Wilson 提交于
      So long as we adhere to the fence registers rules for alignment and no
      overlaps (including with unfenced accesses to linear memory) and account
      for the tiled access in our size allocation, we do not have to allocate
      the full fenced region for the object. This allows us to fight the bloat
      tiling imposed on pre-i965 chipsets and frees up RAM for real use. [Inside
      the GTT we still suffer the additional alignment constraints, so it doesn't
      magic allow us to render larger scenes without stalls -- we need the
      expanded GTT and fence pipelining to overcome those...]
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      a00b10c3
  22. 28 10月, 2010 4 次提交
  23. 27 10月, 2010 1 次提交
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