1. 24 4月, 2019 1 次提交
  2. 04 4月, 2019 1 次提交
  3. 02 4月, 2019 1 次提交
    • Q
      drm/lima: driver for ARM Mali4xx GPUs · a1d2a633
      Qiang Yu 提交于
      - Mali 4xx GPUs have two kinds of processors GP and PP. GP is for
        OpenGL vertex shader processing and PP is for fragment shader
        processing. Each processor has its own MMU so prcessors work in
        virtual address space.
      - There's only one GP but multiple PP (max 4 for mali 400 and 8
        for mali 450) in the same mali 4xx GPU. All PPs are grouped
        togather to handle a single fragment shader task divided by
        FB output tiled pixels. Mali 400 user space driver is
        responsible for assign target tiled pixels to each PP, but mali
        450 has a HW module called DLBU to dynamically balance each
        PP's load.
      - User space driver allocate buffer object and map into GPU
        virtual address space, upload command stream and draw data with
        CPU mmap of the buffer object, then submit task to GP/PP with
        a register frame indicating where is the command stream and misc
        settings.
      - There's no command stream validation/relocation due to each user
        process has its own GPU virtual address space. GP/PP's MMU switch
        virtual address space before running two tasks from different
        user process. Error or evil user space code just get MMU fault
        or GP/PP error IRQ, then the HW/SW will be recovered.
      - Use GEM+shmem for MM. Currently just alloc and pin memory when
        gem object creation. GPU vm map of the buffer is also done in
        the alloc stage in kernel space. We may delay the memory
        allocation and real GPU vm map to command submission stage in the
        furture as improvement.
      - Use drm_sched for GPU task schedule. Each OpenGL context should
        have a lima context object in the kernel to distinguish tasks
        from different user. drm_sched gets task from each lima context
        in a fair way.
      
      mesa driver can be found here before upstreamed:
      https://gitlab.freedesktop.org/lima/mesa
      
      v8:
      - add comments for in_sync
      - fix ctx free miss mutex unlock
      
      v7:
      - remove lima_fence_ops with default value
      - move fence slab create to device probe
      - check pad ioctl args to be zero
      - add comments for user/kernel interface
      
      v6:
      - fix comments by checkpatch.pl
      
      v5:
      - export gp/pp version to userspace
      - rebase on drm-misc-next
      
      v4:
      - use get param interface to get info
      - separate context create/free ioctl
      - remove unused max sched task param
      - update copyright time
      - use xarray instead of idr
      - stop using drmP.h
      
      v3:
      - fix comments from kbuild robot
      - restrict supported arch to tested ones
      
      v2:
      - fix syscall argument check
      - fix job finish fence leak since kernel 5.0
      - use drm syncobj to replace native fence
      - move buffer object GPU va map into kernel
      - reserve syscall argument space for future info
      - remove kernel gem modifier
      - switch TTM back to GEM+shmem MM
      - use time based io poll
      - use whole register name
      - adopt gem reservation obj integration
      - use drm_timeout_abs_to_jiffies
      
      Cc: Eric Anholt <eric@anholt.net>
      Cc: Rob Herring <robh@kernel.org>
      Cc: Christian König <ckoenig.leichtzumerken@gmail.com>
      Cc: Daniel Vetter <daniel@ffwll.ch>
      Cc: Alex Deucher <alexdeucher@gmail.com>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Dave Airlie <airlied@gmail.com>
      Signed-off-by: NAndreas Baierl <ichgeh@imkreisrum.de>
      Signed-off-by: NErico Nunes <nunes.erico@gmail.com>
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: NSimon Shields <simon@lineageos.org>
      Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
      Signed-off-by: NQiang Yu <yuq825@gmail.com>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      Reviewed-by: NRob Herring <robh@kerrnel.org>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Link: https://patchwork.freedesktop.org/patch/291200/
      a1d2a633
  4. 20 3月, 2019 1 次提交
  5. 15 3月, 2019 1 次提交
  6. 12 3月, 2019 1 次提交
  7. 17 1月, 2019 1 次提交
  8. 04 10月, 2018 1 次提交
    • N
      drm/fb_helper: Allow leaking fbdev smem_start · 4be9bd10
      Neil Armstrong 提交于
      Since "drm/fb: Stop leaking physical address", the default behaviour of
      the DRM fbdev emulation is to set the smem_base to 0 and pass the new
      FBINFO_HIDE_SMEM_START flag.
      
      The main reason is to avoid leaking physical addresse to user-space, and
      it follows a general move over the kernel code to avoid user-space to
      manipulate physical addresses and then use some other mechanisms like
      dma-buf to transfer physical buffer handles over multiple subsystems.
      
      But, a lot of devices depends on closed sources binaries to enable
      OpenGL hardware acceleration that uses this smem_start value to
      pass physical addresses to out-of-tree modules in order to render
      into these physical adresses. These should use dma-buf buffers allocated
      from the DRM display device instead and stop relying on fbdev overallocation
      to gather DMA memory (some HW vendors delivers GBM and Wayland capable
      binaries, but older unsupported devices won't have these new binaries
      and are doomed until an Open Source solution like Lima finalizes).
      
      Since these devices heavily depends on this kind of software and because
      the smem_start population was available for years, it's a breakage to
      stop leaking smem_start without any alternative solutions.
      
      This patch adds a Kconfig depending on the EXPERT config and an unsafe
      kernel module parameter tainting the kernel when enabled.
      
      A clear comment and Kconfig help text was added to clarify why and when
      this patch should be reverted, but in the meantime it's a necessary
      feature to keep.
      
      Cc: Dave Airlie <airlied@gmail.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Cc: Noralf Trønnes <noralf@tronnes.org>
      Cc: Maxime Ripard <maxime.ripard@bootlin.com>
      Cc: Eric Anholt <eric@anholt.net>
      Cc: Lucas Stach <l.stach@pengutronix.de>
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Ben Skeggs <skeggsb@gmail.com>
      Cc: Christian König <christian.koenig@amd.com>
      Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
      Reviewed-by: NMaxime Ripard <maxime.ripard@bootlin.com>
      Tested-by: NMaxime Ripard <maxime.ripard@bootlin.com>
      Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Acked-by: NDave Airlie <airlied@gmail.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1538136355-15383-1-git-send-email-narmstrong@baylibre.com
      4be9bd10
  9. 29 8月, 2018 1 次提交
  10. 13 7月, 2018 1 次提交
  11. 10 7月, 2018 1 次提交
    • A
      drm: vkms: select DRM_KMS_HELPER · 5ba57bab
      Arnd Bergmann 提交于
      Without this, we get link errors during randconfig build:
      
      drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa0): undefined reference to `drm_atomic_helper_check'
      drivers/gpu/drm/vkms/vkms_drv.o:(.rodata+0xa8): undefined reference to `drm_atomic_helper_commit'
      drivers/gpu/drm/vkms/vkms_plane.o:(.rodata+0x0): undefined reference to `drm_atomic_helper_update_plane'
      drivers/gpu/drm/vkms/vkms_plane.o:(.rodata+0x8): undefined reference to `drm_atomic_helper_disable_plane'
      drivers/gpu/drm/vkms/vkms_plane.o:(.rodata+0x18): undefined reference to `drm_atomic_helper_plane_reset'
      drivers/gpu/drm/vkms/vkms_plane.o:(.rodata+0x28): undefined reference to `drm_atomic_helper_plane_duplicate_state'
      drivers/gpu/drm/vkms/vkms_plane.o:(.rodata+0x30): undefined reference to `drm_atomic_helper_plane_destroy_state'
      drivers/gpu/drm/vkms/vkms_output.o:(.rodata+0x1c0): undefined reference to `drm_helper_probe_single_connector_modes'
      drivers/gpu/drm/vkms/vkms_crtc.o:(.rodata+0x40): undefined reference to `drm_atomic_helper_crtc_reset'
      drivers/gpu/drm/vkms/vkms_crtc.o:(.rodata+0x70): undefined reference to `drm_atomic_helper_set_config'
      drivers/gpu/drm/vkms/vkms_crtc.o:(.rodata+0x78): undefined reference to `drm_atomic_helper_page_flip'
      drivers/gpu/drm/vkms/vkms_crtc.o:(.rodata+0x90): undefined reference to `drm_atomic_helper_crtc_duplicate_state'
      drivers/gpu/drm/vkms/vkms_crtc.o:(.rodata+0x98): undefined reference to `drm_atomic_helper_crtc_destroy_state'
      
      Fixes: 854502fa ("drm/vkms: Add basic CRTC initialization")
      Fixes: 1c7c5fd9 ("drm/vkms: Introduce basic VKMS driver")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180709154901.1989316-1-arnd@arndb.de
      5ba57bab
  12. 05 7月, 2018 2 次提交
  13. 04 5月, 2018 3 次提交
  14. 03 4月, 2018 1 次提交
    • O
      drm/xen-front: Add support for Xen PV display frontend · c575b7ee
      Oleksandr Andrushchenko 提交于
      Add support for Xen para-virtualized frontend display driver.
      Accompanying backend [1] is implemented as a user-space application
      and its helper library [2], capable of running as a Weston client
      or DRM master.
      Configuration of both backend and frontend is done via
      Xen guest domain configuration options [3].
      
      Driver limitations:
       1. Only primary plane without additional properties is supported.
       2. Only one video mode supported which resolution is configured
          via XenStore.
       3. All CRTCs operate at fixed frequency of 60Hz.
      
      1. Implement Xen bus state machine for the frontend driver according to
      the state diagram and recovery flow from display para-virtualized
      protocol: xen/interface/io/displif.h.
      
      2. Read configuration values from Xen store according
      to xen/interface/io/displif.h protocol:
        - read connector(s) configuration
        - read buffer allocation mode (backend/frontend)
      
      3. Handle Xen event channels:
        - create for all configured connectors and publish
          corresponding ring references and event channels in Xen store,
          so backend can connect
        - implement event channels interrupt handlers
        - create and destroy event channels with respect to Xen bus state
      
      4. Implement shared buffer handling according to the
      para-virtualized display device protocol at xen/interface/io/displif.h:
        - handle page directories according to displif protocol:
          - allocate and share page directories
          - grant references to the required set of pages for the
            page directory
        - allocate xen balllooned pages via Xen balloon driver
          with alloc_xenballooned_pages/free_xenballooned_pages
        - grant references to the required set of pages for the
          shared buffer itself
        - implement pages map/unmap for the buffers allocated by the
          backend (gnttab_map_refs/gnttab_unmap_refs)
      
      5. Implement kernel modesetiing/connector handling using
      DRM simple KMS helper pipeline:
      
      - implement KMS part of the driver with the help of DRM
        simple pipepline helper which is possible due to the fact
        that the para-virtualized driver only supports a single
        (primary) plane:
        - initialize connectors according to XenStore configuration
        - handle frame done events from the backend
        - create and destroy frame buffers and propagate those
          to the backend
        - propagate set/reset mode configuration to the backend on display
          enable/disable callbacks
        - send page flip request to the backend and implement logic for
          reporting backend IO errors on prepare fb callback
      
      - implement virtual connector handling:
        - support only pixel formats suitable for single plane modes
        - make sure the connector is always connected
        - support a single video mode as per para-virtualized driver
          configuration
      
      6. Implement GEM handling depending on driver mode of operation:
      depending on the requirements for the para-virtualized environment,
      namely requirements dictated by the accompanying DRM/(v)GPU drivers
      running in both host and guest environments, number of operating
      modes of para-virtualized display driver are supported:
       - display buffers can be allocated by either
         frontend driver or backend
       - display buffers can be allocated to be contiguous
         in memory or not
      
      Note! Frontend driver itself has no dependency on contiguous memory for
      its operation.
      
      6.1. Buffers allocated by the frontend driver.
      
      The below modes of operation are configured at compile-time via
      frontend driver's kernel configuration.
      
      6.1.1. Front driver configured to use GEM CMA helpers
           This use-case is useful when used with accompanying DRM/vGPU driver
           in guest domain which was designed to only work with contiguous
           buffers, e.g. DRM driver based on GEM CMA helpers: such drivers can
           only import contiguous PRIME buffers, thus requiring frontend driver
           to provide such. In order to implement this mode of operation
           para-virtualized frontend driver can be configured to use
           GEM CMA helpers.
      
      6.1.2. Front driver doesn't use GEM CMA
           If accompanying drivers can cope with non-contiguous memory then, to
           lower pressure on CMA subsystem of the kernel, driver can allocate
           buffers from system memory.
      
      Note! If used with accompanying DRM/(v)GPU drivers this mode of operation
      may require IOMMU support on the platform, so accompanying DRM/vGPU
      hardware can still reach display buffer memory while importing PRIME
      buffers from the frontend driver.
      
      6.2. Buffers allocated by the backend
      
      This mode of operation is run-time configured via guest domain
      configuration through XenStore entries.
      
      For systems which do not provide IOMMU support, but having specific
      requirements for display buffers it is possible to allocate such buffers
      at backend side and share those with the frontend.
      For example, if host domain is 1:1 mapped and has DRM/GPU hardware
      expecting physically contiguous memory, this allows implementing
      zero-copying use-cases.
      
      Note, while using this scenario the following should be considered:
        a) If guest domain dies then pages/grants received from the backend
           cannot be claimed back
        b) Misbehaving guest may send too many requests to the
           backend exhausting its grant references and memory
           (consider this from security POV).
      
      Note! Configuration options 1.1 (contiguous display buffers) and 2
      (backend allocated buffers) are not supported at the same time.
      
      7. Handle communication with the backend:
       - send requests and wait for the responses according
         to the displif protocol
       - serialize access to the communication channel
       - time-out used for backend communication is set to 3000 ms
       - manage display buffers shared with the backend
      
      [1] https://github.com/xen-troops/displ_be
      [2] https://github.com/xen-troops/libxenbe
      [3] https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=docs/man/xl.cfg.pod.5.in;h=a699367779e2ae1212ff8f638eff0206ec1a1cc9;hb=refs/heads/master#l1257Signed-off-by: NOleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
      Reviewed-by: NBoris Ostrovsky <boris.ostrovsky@oracle.com>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180403112317.28751-2-andr2000@gmail.com
      c575b7ee
  15. 17 1月, 2018 1 次提交
  16. 08 12月, 2017 1 次提交
  17. 05 12月, 2017 3 次提交
  18. 27 9月, 2017 2 次提交
  19. 19 9月, 2017 1 次提交
  20. 24 8月, 2017 1 次提交
    • L
      drm/tve200: Add new driver for TVE200 · 179c02fe
      Linus Walleij 提交于
      This adds a new DRM driver for the Faraday Technology TVE200
      block. This "TV Encoder" encodes a ITU-T BT.656 stream and can
      be found in the StorLink SL3516 (later Cortina Systems CS3516)
      as well as the Grain Media GM8180.
      
      I do not have definitive word from anyone at Faraday that this
      IP block is theirs, but it bears the hallmark of their 3-digit
      version code (200) and is used in two SoCs from completely
      different companies. (Grain Media was fully owned by Faraday
      until it was transferred to NovoTek this january, and
      Faraday did lots of work on the StorLink SoCs.)
      
      The D-Link DIR-685 uses this in connection with the Ilitek
      ILI9322 panel driver that supports BT.656 input, while the
      GM8180 apparently has been used with the Cirrus Logic CS4954
      digital video encoder. The oldest user seems to be
      something called Techwall 2835.
      
      This driver is heavily inspired by Eric Anholt's PL111
      driver and therefore I have mentioned all the ancestor authors
      in the header file.
      Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Link: https://patchwork.freedesktop.org/patch/msgid/20170820100557.24991-2-linus.walleij@linaro.org
      179c02fe
  21. 09 5月, 2017 1 次提交
    • T
      drm/pl111: Initial drm/kms driver for pl111 · bed41005
      Tom Cooksey 提交于
      This is a modesetting driver for the pl111 CLCD display controller
      found on various ARM platforms such as the Versatile Express. The
      driver has only been tested on the bcm911360_entphn platform so far,
      with PRIME-based buffer sharing between vc4 and clcd.
      
      It reuses the existing devicetree binding, while not using quite as
      many of its properties as the fbdev driver does (those are left for
      future work).
      
      v2: Nearly complete rewrite by anholt, cutting 2/3 of the code thanks
          to DRM core's excellent new helpers.
      v3: Don't match pl110 any more, don't attach if we don't have a DRM
          panel, use DRM_GEM_CMA_FOPS, update MAINTAINERS, use the simple
          display helper, use drm_gem_cma_dumb_create (same as our wrapper).
      v4: Change the driver's .name to not clash with fbdev in sysfs, drop
          platform alias, drop redundant "drm" in DRM driver name, hook up
          .prepare_fb to the CMA helper so that DMA fences should work.
      v5: Move register definitions inside the driver directory, fix build
          in COMPILE_TEST and !AMBA mode.
      v6: Drop TIM2_CLKSEL for now to be consistent with existing DT
          bindings, switch back to external register definitions.
      Signed-off-by: NTom Cooksey <tom.cooksey@arm.com>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Reviewed-by: Linus Walleij <linus.walleij@linaro.org> (v5)
      Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170413031746.12921-2-eric@anholt.net
      bed41005
  22. 15 4月, 2017 1 次提交
  23. 27 2月, 2017 1 次提交
  24. 19 2月, 2017 1 次提交
  25. 12 1月, 2017 1 次提交
  26. 09 1月, 2017 1 次提交
  27. 06 1月, 2017 2 次提交
  28. 27 12月, 2016 2 次提交
  29. 06 12月, 2016 1 次提交
    • M
      drm: Add new driver for MXSFB controller · 45d59d70
      Marek Vasut 提交于
      Add new driver for the MXSFB controller found in i.MX23/28/6SX .
      The MXSFB controller is a simple framebuffer controller with one
      parallel LCD output. Unlike the MXSFB fbdev driver that is used
      on these systems now, this driver uses the DRM/KMS framework.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Lucas Stach <l.stach@pengutronix.de>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Cc: Shawn Guo <shawnguo@kernel.org>
      45d59d70
  30. 01 12月, 2016 1 次提交
    • N
      drm: Add support for Amlogic Meson Graphic Controller · bbbe775e
      Neil Armstrong 提交于
      The Amlogic Meson Display controller is composed of several components :
      
      DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
         | vd1   _______     _____________    _________________     |               |
      D  |-------|      |----|            |   |                |    |   HDMI PLL    |
      D  | vd2   | VIU  |    | Video Post |   | Video Encoders |<---|-----VCLK      |
      R  |-------|      |----| Processing |   |                |    |               |
         | osd2  |      |    |            |---| Enci ----------|----|-----VDAC------|
      R  |-------| CSC  |----| Scalers    |   | Encp ----------|----|----HDMI-TX----|
      A  | osd1  |      |    | Blenders   |   | Encl ----------|----|---------------|
      M  |-------|______|----|____________|   |________________|    |               |
      ___|__________________________________________________________|_______________|
      
      VIU: Video Input Unit
      ---------------------
      
      The Video Input Unit is in charge of the pixel scanout from the DDR memory.
      It fetches the frames addresses, stride and parameters from the "Canvas" memory.
      This part is also in charge of the CSC (Colorspace Conversion).
      It can handle 2 OSD Planes and 2 Video Planes.
      
      VPP: Video Post Processing
      --------------------------
      
      The Video Post Processing is in charge of the scaling and blending of the
      various planes into a single pixel stream.
      There is a special "pre-blending" used by the video planes with a dedicated
      scaler and a "post-blending" to merge with the OSD Planes.
      The OSD planes also have a dedicated scaler for one of the OSD.
      
      VENC: Video Encoders
      --------------------
      
      The VENC is composed of the multiple pixel encoders :
       - ENCI : Interlace Video encoder for CVBS and Interlace HDMI
       - ENCP : Progressive Video Encoder for HDMI
       - ENCL : LCD LVDS Encoder
      The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
      tree and provides the scanout clock to the VPP and VIU.
      The ENCI is connected to a single VDAC for Composite Output.
      The ENCI and ENCP are connected to an on-chip HDMI Transceiver.
      
      This driver is a DRM/KMS driver using the following DRM components :
       - GEM-CMA
       - PRIME-CMA
       - Atomic Modesetting
       - FBDev-CMA
      
      For the following SoCs :
       - GXBB Family (S905)
       - GXL Family (S905X, S905D)
       - GXM Family (S912)
      
      The current driver only supports the CVBS PAL/NTSC output modes, but the
      CRTC/Planes management should support bigger modes.
      But Advanced Colorspace Conversion, Scaling and HDMI Modes will be added in
      a second time.
      
      The Device Tree bindings makes use of the endpoints video interface definitions
      to connect to the optional CVBS and in the future the HDMI Connector nodes.
      
      HDMI Support is planned for a next release.
      Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
      bbbe775e
  31. 16 11月, 2016 1 次提交
    • G
      drm/fence: add in-fences support · 96260142
      Gustavo Padovan 提交于
      There is now a new property called IN_FENCE_FD attached to every plane
      state that receives sync_file fds from userspace via the atomic commit
      IOCTL.
      
      The fd is then translated to a fence (that may be a fence_array
      subclass or just a normal fence) and then used by DRM to fence_wait() for
      all fences in the sync_file to signal. So it only commits when all
      framebuffers are ready to scanout.
      
      v2: Comments by Daniel Vetter:
      	- remove set state->fence = NULL in destroy phase
      	- accept fence -1 as valid and just return 0
      	- do not call fence_get() - sync_file_fences_get() already calls it
      	- fence_put() if state->fence is already set, in case userspace
      	set the property more than once.
      
      v3: WARN_ON if fence is set but state has no FB
      
      v4: Comment from Maarten Lankhorst
      	- allow set fence with no related fb
      
      v5: rename FENCE_FD to IN_FENCE_FD
      
      v6: Comments by Daniel Vetter:
      	- rename plane_state->in_fence back to "fence"
      	- re-introduce WARN_ON if fence set but no fb
      
           - rebase after fence -> dma_fence rename
      
      v7: Comments by Brian Starkey
      	- set state->fence to NULL when duplicating the state
      	- fail if IN_FENCE_FD was already set
      
      v8: rebase against latest drm-misc
      Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Reviewed-by: NBrian Starkey <brian.starkey@arm.com>
      Reviewed-by: NSean Paul <seanpaul@chromium.org>
      Tested-by: NRobert Foss <robert.foss@collabora.com>
      [danvet: Rebase onto extracted drm_mode_config.[hc].]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      96260142
  32. 10 11月, 2016 1 次提交