1. 08 11月, 2019 31 次提交
  2. 07 11月, 2019 9 次提交
    • E
      net_sched: gen_estimator: extend packet counter to 64bit · 1c8dd9cb
      Eric Dumazet 提交于
      I forgot to change last_packets field in struct net_rate_estimator.
      
      Without this fix, rate estimators would misbehave after more
      than 2^32 packets have been sent.
      
      Another solution would be to be careful and only use the
      32 least significant bits of packets counters, but we have
      a hole in net_rate_estimator structure and this looks
      easier to read/maintain.
      
      Fixes: d0083d98 ("net_sched: extend packet counter to 64bit")
      Signed-off-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1c8dd9cb
    • C
      dpaa2-ptp: fix compile error · 2d791e3b
      Chenwandun 提交于
      phylink_set_port_modes will be compiled if CONFIG_PHYLINK enabled,
      dpaa2_mac_validate will be compiled if CONFIG_FSL_DPAA2_ETH enabled,
      it should select CONFIG_PHYLINK when dpaa2_mac_validate call
      phylink_set_port_modes
      
      drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_validate':
      dpaa2-mac.c:(.text+0x3a1): undefined reference to `phylink_set_port_modes'
      drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_connect':
      dpaa2-mac.c:(.text+0x91a): undefined reference to `phylink_create'
      dpaa2-mac.c:(.text+0x94e): undefined reference to `phylink_of_phy_connect'
      dpaa2-mac.c:(.text+0x97f): undefined reference to `phylink_destroy'
      drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_disconnect':
      dpaa2-mac.c:(.text+0xa9f): undefined reference to `phylink_disconnect_phy'
      dpaa2-mac.c:(.text+0xab0): undefined reference to `phylink_destroy'
      make: *** [vmlinux] Error 1
      
      Fixes: 71947923 ("dpaa2-eth: add MAC/PHY support through phylink")
      Signed-off-by: NChenwandun <chenwandun@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2d791e3b
    • D
      Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue · fdc66c3d
      David S. Miller 提交于
      Jeff Kirsher says:
      
      ====================
      100GbE Intel Wired LAN Driver Updates 2019-11-06
      
      This series contains updates to ice driver only.
      
      Scott adds ethtool -m support so that we can read eeprom data on SFP/OSFP
      modules.
      
      Anirudh updates the return value to properly reflect when SRIOV is not
      supported.
      
      Md Fahad updates the driver to handle a change in the NVM, where the
      boot configuration section was moved to the Preserved Field Area (PFA)
      of the NVM.
      
      Paul resolves an issue when DCBx requests non-contiguous TCs, transmit
      hangs could occur, so configure a default traffic class (TC0) in these
      cases to prevent traffic hangs.  Adds a print statement to notify the
      user when unsupported modules are inserted.
      
      Bruce fixes up the driver unload code flow to ensure we do not clear the
      interrupt scheme until the reset is complete, otherwise a hardware error
      may occur.
      
      Dave updates the DCB initialization to set is_sw_lldp boolean when the
      firmware has been detected to be in an untenable state.  This will
      ensure that the firmware is in a known state.
      
      Michal saves off the PCI state and I/O BARs address after PCI bus reset
      so that after the reset, device registers can be read.  Also adds a NULL
      pointer check to prevent a potential kernel panic.
      
      Mitch resolves an issue where VF's on PF's other than 0 were not seeing
      resets by using the per-PF VF ID instead of the absolute VF ID.
      
      Krzysztof does some code cleanup to remove a unneeded wrapper and
      reduces the code complexity.
      
      Brett reduces confusion by changing the name of ice_vc_dis_vf() to
      ice_vc_reset_vf() to better describe what the function is actually
      doing.
      
      v2: dropped patch 3 "ice: Add support for FW recovery mode detection"
          from the origin al series, while Ani makes changes based on
          community feedback to implement devlink into the changes.
      v3: dropped patch 1 "ice: implement set_eeprom functionality" due to a
          bug found and additional changes will be needed when Ani implements
          devlink in the driver.
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fdc66c3d
    • A
      net: dsa: mv8e6xxx: Fix stub function parameters · 64a26007
      Andrew Lunn 提交于
      mv88e6xxx_g2_atu_stats_get() takes two parameters. Make the stub
      function also take two, otherwise we get compile errors.
      
      Fixes: c5f299d5 ("net: dsa: mv88e6xxx: global1_atu: Add helper for get next")
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      64a26007
    • D
      Merge branch 'net-phy-at803x-device-tree-binding' · 16cf4222
      David S. Miller 提交于
      Michael Walle says:
      
      ====================
      net: phy: at803x device tree binding
      
      Adds a device tree binding to configure the clock and the RGMII voltage.
      
      Changes since v1:
       - rebased to latest net-next
       - renamed "Atheros" to "Qualcomm Atheros"
       - add a new patch to remove config_init() from AR9331
      
      Changes since the RFC:
       - renamed the Kconfig entry to "Qualcomm Atheros.." and reordered the
         item
       - renamed the prefix from atheros to qca
       - use the correct name AR803x (instead of AT803x) in new files and
         dt-bindings.
       - listed the PHY maintainers in the new schema. Hopefully, thats ok.
       - fixed a typo in the bindings schema
       - run dtb_checks and dt_binding_check and fixed the schema
       - dropped the rgmii-io-1v8 property; instead provide two regulators vddh
         and vddio, add one consumer vddio-supply
       - fix the clock settings for the AR8030/AR8035
       - only the AR8031 supports chaning the LDO and the PLL mode in software.
         Check if we have the correct PHY.
       - new patch to mention the AR8033 which is the same as the AR8031 just
         without PTP support
       - new patch which corrects any displayed PHY names and comments. Be
         consistent.
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      16cf4222
    • M
      net: phy: at803x: remove config_init for AR9331 · ed7fa2ad
      Michael Walle 提交于
      According to its datasheet, the internal PHY doesn't have debug
      registers nor MMDs. Since config_init() only configures delays and
      clocks and so on in these registers it won't be needed on this PHY.
      Remove it.
      Signed-off-by: NMichael Walle <michael@walle.cc>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ed7fa2ad
    • M
      net: phy: at803x: fix the PHY names · 96c36712
      Michael Walle 提交于
      Fix at least the displayed strings. The actual name of the chip is
      AR803x.
      Signed-off-by: NMichael Walle <michael@walle.cc>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      96c36712
    • M
      net: phy: at803x: mention AR8033 as same as AR8031 · 428061f7
      Michael Walle 提交于
      The AR8033 is the AR8031 without PTP support. All other registers are
      the same. Unfortunately, they share the same PHY ID. Therefore, we
      cannot distinguish between the one with PTP support and the one without.
      Signed-off-by: NMichael Walle <michael@walle.cc>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      428061f7
    • M
      net: phy: at803x: add device tree binding · 2f664823
      Michael Walle 提交于
      Add support for configuring the CLK_25M pin as well as the RGMII I/O
      voltage by the device tree.
      Signed-off-by: NMichael Walle <michael@walle.cc>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2f664823