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  1. 18 2月, 2016 1 次提交
    • M
      pinctrl: sh-pfc: Rework PFC GPIO support · abc60d48
      由 Magnus Damm 提交于 
      The sh-pfc pinctrl driver is currently handling SoC-specific
PFC hardware blocks on ARM64, ARM and SH architectures.

For older SoCs using SH cores and some 32-bit ARM SoCs the PFC
hardware also provides GPIO functionality. On the majority of
32-bit ARM SoCs from Renesas and so far all ARM64 SoCs the GPIO
feature is provided by separate hardware blocks.

So far GPIO support in the PFC driver has been compiled-in for
the majority of the SoCs, but with this patch applied the SoCs
with PFC support may select from one of the following:
 - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware
 - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support

This patch results in the following changes:
 - The GPIO functionality is only compiled-in on relevant SoCs
 - The number of lines of code is reduced

Build tested using the following configurations:
 - r8a7795 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM64)
 - r8a7790 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM)
 - r8a7790 + r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM)
 - r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM)
 - sh7751 -> CONFIG_PINCTRL_SH_PFC=n -> OK (SH rts7751r2d1)
 - sh7724 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (SH ecovec24)
Signed-off-by: NMagnus Damm <damm+renesas@opensource.se>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
[geert: s/def_bool n/bool/]
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      abc60d48
  3. 02 10月, 2015 1 次提交
  5. 16 6月, 2015 1 次提交
    • H
      pinctrl: sh-pfc: add R8A7794 PFC support · 43c4436e
      由 Hisashi Nakamura 提交于 
      Add PFC support for  the  R8A7794 SoC  including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...

Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the  comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.

Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.

Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().

Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
  CPU_ALL_PORT() macro.

Changes in version 2:
- rebased the patch.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      43c4436e
  7. 12 5月, 2015 1 次提交
  9. 29 1月, 2015 1 次提交
  11. 27 1月, 2015 1 次提交
  13. 27 10月, 2013 1 次提交
  15. 05 6月, 2013 1 次提交
  17. 04 6月, 2013 3 次提交
  19. 16 4月, 2013 1 次提交
  21. 03 4月, 2013 1 次提交
  23. 15 3月, 2013 1 次提交
  25. 25 1月, 2013 19 次提交
  27. 20 7月, 2012 1 次提交
  29. 10 7月, 2012 2 次提交
    • P
      sh: pfc: Rudimentary pinctrl-backed GPIO support. · ca5481c6
      由 Paul Mundt 提交于 
      This begins the migration of the PFC core to the pinctrl subsystem.
Initial support is very basic, with the bulk of the implementation simply
being nopped out in such a way to allow registration with the pinctrl
core to succeed.

The gpio chip driver is stripped down considerably now relying purely on
pinctrl API calls to manage the bulk of its operations.

This provides a basis for further PFC refactoring, including decoupling
pin functions from the GPIO API, establishing pin groups, and so forth.
These will all be dealt with incrementally so as to introduce as few
growing and migratory pains to tree-wide PFC pinmux users today.

When the interfaces have been well established and in-tree users have
been migrated off of the legacy interfaces it will be possible to strip
down the core considerably, leading to eventual drivers/pinctrl rehoming.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      ca5481c6
    • P
      sh: pfc: Shuffle PFC support core. · afae021a
      由 Paul Mundt 提交于 
      This follows the intc/clk changes and shuffles the PFC support code under
its own directory. This will facilitate better code sharing, and allow us
to trim down the exported interface by quite a margin.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      afae021a
  31. 20 6月, 2012 1 次提交
  33. 05 10月, 2010 2 次提交
    • P
      sh: intc: Split up the INTC code. · 2be6bb0c
      由 Paul Mundt 提交于 
      This splits up the sh intc core in to something more vaguely resembling
a subsystem. Most of the functionality was alread fairly well
compartmentalized, and there were only a handful of interdependencies
that needed to be resolved in the process.

This also serves as future-proofing for the genirq and sparseirq rework,
which will make some of the split out functionality wholly generic,
allowing things to be killed off in place with minimal migration pain.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      2be6bb0c
    • P
      sh: intc: Implement reverse mapping for IRQs to per-controller IDs. · 44629f57
      由 Paul Mundt 提交于 
      This implements a scheme roughly analogous to the PowerPC virtual to
hardware IRQ mapping, which we use for IRQ to per-controller ID mapping.
This makes it possible for drivers to use the IDs directly for lookup
instead of hardcoding the vector.

The main motivation for this work is as a building block for dynamically
allocating virtual IRQs for demuxing INTC events sharing a single INTEVT
in addition to a common masking source.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      44629f57
  35. 02 10月, 2010 1 次提交