1. 22 10月, 2013 1 次提交
  2. 20 8月, 2013 4 次提交
  3. 12 8月, 2013 1 次提交
  4. 31 7月, 2013 1 次提交
  5. 11 7月, 2013 1 次提交
  6. 09 7月, 2013 2 次提交
  7. 01 7月, 2013 1 次提交
  8. 29 6月, 2013 1 次提交
    • L
      acpi: Eliminate console msg if pstore.backend excludes ERST · 74fd6c6f
      Lenny Szubowicz 提交于
      This is patch 2/3 of a patch set that avoids what misleadingly appears
      to be a error during boot:
      
      ERST: Could not register with persistent store
      
      This message is displayed if the system has a valid ACPI ERST table and the
      pstore.backend kernel parameter has been used to disable use of ERST by
      pstore. But this same message is used for errors that preclude registration.
      
      In erst_init don't complain if the setting of kernel parameter pstore.backend
      precludes use of ACPI ERST for pstore. Routine pstore_register will inform
      about the facility that does register.
      
      Also, don't leave a dangling pointer to deallocated mem for the pstore
      buffer when registration fails.
      Signed-off-by: NLenny Szubowicz <lszubowi@redhat.com>
      Reported-by: NNaotaka Hamaguchi <n.hamaguchi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      74fd6c6f
  9. 07 6月, 2013 2 次提交
    • C
      ACPI/APEI: Add parameter check before error injection · c5a13032
      Chen Gong 提交于
      When param1 is enabled in EINJ but not assigned with a valid
      value, sometimes it will cause the error like below:
      
      APEI: Can not request [mem 0x7aaa7000-0x7aaa7007] for APEI EINJ Trigger registers
      
      It is because some firmware will access target address specified in
      param1 to trigger the error when injecting memory error. This will
      cause resource conflict with regular memory. So It must be removed
      from trigger table resources, but incorrect param1/param2
      combination will stop this action. Add extra check to avoid
      this kind of error.
      Signed-off-by: NChen Gong <gong.chen@linux.intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      c5a13032
    • B
      ACPI / APEI: Force fatal AER severity when component has been reset · 0ba98ec9
      Betty Dall 提交于
      The CPER error record has a reset bit that indicates that the platform
      has reset the component. The reset bit can be set for any severity
      error including recoverable.  From the AER code path's perspective,
      any error is fatal if the component has been reset.  This patch
      upgrades the severity of the AER recovery to AER_FATAL whenever the
      CPER error record indicates that the component has been reset.
      
      [bhelgaas: s/bus has been reset/component has been reset/]
      Signed-off-by: NBetty Dall <betty.dall@hp.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      0ba98ec9
  10. 06 6月, 2013 1 次提交
  11. 05 6月, 2013 1 次提交
  12. 31 5月, 2013 1 次提交
  13. 27 3月, 2013 1 次提交
  14. 26 2月, 2013 1 次提交
  15. 23 2月, 2013 1 次提交
  16. 22 2月, 2013 1 次提交
  17. 19 1月, 2013 1 次提交
  18. 04 1月, 2013 1 次提交
  19. 03 1月, 2013 1 次提交
  20. 08 12月, 2012 1 次提交
    • C
      ACPI, APEI, EINJ: Add missed ACPI5 support for error trigger table · 112f1fc0
      Chen Gong 提交于
      To handle error trigger table correctly, memory region must be
      removed from request region. We had a series of patches to do this
      culminating in:
      	commit b4e008dc
      	ACPI, APEI, EINJ, Refine the fix of resource conflict
      
      but when ACPI5 support was added, we missed updating this area. So
      when using EINJ table on an ACPI5 enabled machine, we get following error:
      
      APEI: Can not request [mem 0x526b80000-0x526b80007] for APEI EINJ
      Trigger registers
      
      Fix this by checking for the acpi5 case and using the same code
      that was added earlier.
      Signed-off-by: NChen Gong <gong.chen@linux.intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      112f1fc0
  21. 29 11月, 2012 1 次提交
  22. 27 11月, 2012 2 次提交
    • S
      efi_pstore: Add a sequence counter to a variable name · 755d4fe4
      Seiji Aguchi 提交于
      [Issue]
      
      Currently, a variable name, which identifies each entry, consists of type, id and ctime.
      But if multiple events happens in a short time, a second/third event may fail to log because
      efi_pstore can't distinguish each event with current variable name.
      
      [Solution]
      
      A reasonable way to identify all events precisely is introducing a sequence counter to
      the variable name.
      
      The sequence counter has already supported in a pstore layer with "oopscount".
      So, this patch adds it to a variable name.
      Also, it is passed to read/erase callbacks of platform drivers in accordance with
      the modification of the variable name.
      
        <before applying this patch>
       a variable name of first event: dump-type0-1-12345678
       a variable name of second event: dump-type0-1-12345678
      
        type:0
        id:1
        ctime:12345678
      
       If multiple events happen in a short time, efi_pstore can't distinguish them because
       variable names are same among them.
      
        <after applying this patch>
      
       it can be distinguishable by adding a sequence counter as follows.
      
       a variable name of first event: dump-type0-1-1-12345678
       a variable name of Second event: dump-type0-1-2-12345678
      
        type:0
        id:1
        sequence counter: 1(first event), 2(second event)
        ctime:12345678
      
      In case of a write callback executed in pstore_console_write(), "0" is added to
      an argument of the write callback because it just logs all kernel messages and
      doesn't need to care about multiple events.
      Signed-off-by: NSeiji Aguchi <seiji.aguchi@hds.com>
      Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Acked-by: NMike Waychison <mikew@google.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      755d4fe4
    • S
      efi_pstore: Add ctime to argument of erase callback · a9efd39c
      Seiji Aguchi 提交于
      [Issue]
      
      Currently, a variable name, which is used to identify each log entry, consists of type,
      id and ctime. But an erase callback does not use ctime.
      
      If efi_pstore supported just one log, type and id were enough.
      However, in case of supporting multiple logs, it doesn't work because
      it can't distinguish each entry without ctime at erasing time.
      
       <Example>
      
       As you can see below, efi_pstore can't differentiate first event from second one without ctime.
      
       a variable name of first event: dump-type0-1-12345678
       a variable name of second event: dump-type0-1-23456789
      
        type:0
        id:1
        ctime:12345678, 23456789
      
      [Solution]
      
      This patch adds ctime to an argument of an erase callback.
      
      It works across reboots because ctime of pstore means the date that the record was originally stored.
      To do this, efi_pstore saves the ctime to variable name at writing time and passes it to pstore
      at reading time.
      Signed-off-by: NSeiji Aguchi <seiji.aguchi@hds.com>
      Acked-by: NMike Waychison <mikew@google.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      a9efd39c
  23. 22 11月, 2012 1 次提交
  24. 14 7月, 2012 1 次提交
  25. 12 6月, 2012 1 次提交
  26. 30 3月, 2012 5 次提交
    • J
      CPER failed to handle generic error records with multiple sections · 37d2a362
      Jiang Liu 提交于
      The function apei_estatus_print() and apei_estatus_check() forget to move ahead
      the gdata pointer when dealing with multiple generic error data sections.
      Signed-off-by: NJiang Liu <jiang.liu@huawei.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      37d2a362
    • G
      ACPI, APEI: Fix incorrect APEI register bit width check and usage · 15afae60
      Gary Hade 提交于
      The current code incorrectly assumes that
      (1) the APEI register bit width is always 8, 16, 32, or 64 and
      (2) the APEI register bit width is always equal to the APEI
          register access width.
      
      ERST serialization instructions entries such as:
      
      [030h 0048   1]                       Action : 00 [Begin Write Operation]
      [031h 0049   1]                  Instruction : 03 [Write Register Value]
      [032h 0050   1]        Flags (decoded below) : 01
                            Preserve Register Bits : 1
      [033h 0051   1]                     Reserved : 00
      
      [034h 0052  12]              Register Region : [Generic Address Structure]
      [034h 0052   1]                     Space ID : 00 [SystemMemory]
      [035h 0053   1]                    Bit Width : 03
      [036h 0054   1]                   Bit Offset : 00
      [037h 0055   1]         Encoded Access Width : 03 [DWord Access:32]
      [038h 0056   8]                      Address : 000000007F2D7038
      
      [040h 0064   8]                        Value : 0000000000000001
      [048h 0072   8]                         Mask : 0000000000000007
      
      break this assumption by yielding:
        [Firmware Bug]: APEI: Invalid bit width in GAR [0x7f2d7038/3/0]
      
      I have found no ACPI specification requirements corresponding
      with the above assumptions.  There is even a good example in
      the Serialization Instruction Entries section (ACPI 4.0 section
      17.4,1.2, ACPI 4.0a section 2.5.1.2, ACPI 5.0 section 18.5.1.2)
      that mentions a serialization instruction with a bit range of
      [6:2] which is 5 bits wide, _not_ 8, 16, 32, or 64 bits wide.
      
      Compile and boot tested with 3.3.0-rc7 on a IBM HX5.
      Signed-off-by: NGary Hade <garyhade@us.ibm.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      15afae60
    • C
      ACPI, APEI, EINJ, new parameter to control trigger action · ee49089d
      Chen Gong 提交于
      Some APEI firmware implementation will access injected address
      specified in param1 to trigger the error when injecting memory
      error, which means if one SRAR error is injected, the crash
      always happens because it is executed in kernel context. This
      new parameter can disable trigger action and control is taken
      over by the user. In this way, an SRAR error can happen in user
      context instead of crashing the system. This function is highly
      depended on BIOS implementation so please ensure you know the
      BIOS trigger procedure before you enable this switch.
      
      v2:
        notrigger should be created together with param1/param2
      Tested-by: NTony Luck <tony.luck@lintel.com>
      Signed-off-by: NChen Gong <gong.chen@linux.intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      ee49089d
    • C
      ACPI, APEI, EINJ, limit the range of einj_param · 185210cc
      Chen Gong 提交于
      On the platforms with ACPI4.x support, parameter extension
      is not always doable, which means only parameter extension
      is enabled, einj_param can take effect.
      
      v2->v1: stopping early in einj_get_parameter_address for einj_param
      Signed-off-by: NChen Gong <gong.chen@linux.intel.com>
      Acked-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      185210cc
    • J
      ACPI, APEI, Fix ERST header length check · 7ed28f2e
      Jiang Liu 提交于
      This fixes a trivial copy & paste error in ERST header length check.
      It's just for future safety because sizeof(struct acpi_table_einj)
      equals to sizeof(struct acpi_table_erst) with current ACPI5.0
      specification. It applies to v3.3-rc6.
      Signed-off-by: NJiang Liu <jiang.liu@huawei.com>
      Acked-by: NHuang Ying <ying.huang@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      7ed28f2e
  27. 22 3月, 2012 1 次提交
  28. 24 1月, 2012 3 次提交