1. 29 10月, 2013 1 次提交
  2. 24 10月, 2013 2 次提交
  3. 19 10月, 2013 1 次提交
  4. 11 10月, 2013 5 次提交
    • S
      ARM: mm: Recreate kernel mappings in early_paging_init() · a77e0c7b
      Santosh Shilimkar 提交于
      This patch adds a step in the init sequence, in order to recreate
      the kernel code/data page table mappings prior to full paging
      initialization.  This is necessary on LPAE systems that run out of
      a physical address space outside the 4G limit.  On these systems,
      this implementation provides a machine descriptor hook that allows
      the PHYS_OFFSET to be overridden in a machine specific fashion.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NR Sricharan <r.sricharan@ti.com>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      a77e0c7b
    • S
      ARM: mm: Correct virt_to_phys patching for 64 bit physical addresses · f52bb722
      Sricharan R 提交于
      The current phys_to_virt patching mechanism works only for 32 bit
      physical addresses and this patch extends the idea for 64bit physical
      addresses.
      
      The 64bit v2p patching mechanism patches the higher 8 bits of physical
      address with a constant using 'mov' instruction and lower 32bits are patched
      using 'add'. While this is correct, in those platforms where the lowmem addressable
      physical memory spawns across 4GB boundary, a carry bit can be produced as a
      result of addition of lower 32bits. This has to be taken in to account and added
      in to the upper. The patched __pv_offset and va are added in lower 32bits, where
      __pv_offset can be in two's complement form when PA_START < VA_START and that can
      result in a false carry bit.
      
      e.g
          1) PA = 0x80000000; VA = 0xC0000000
             __pv_offset = PA - VA = 0xC0000000 (2's complement)
      
          2) PA = 0x2 80000000; VA = 0xC000000
             __pv_offset = PA - VA = 0x1 C0000000
      
      So adding __pv_offset + VA should never result in a true overflow for (1).
      So in order to differentiate between a true carry, a __pv_offset is extended
      to 64bit and the upper 32bits will have 0xffffffff if __pv_offset is
      2's complement. So 'mvn #0' is inserted instead of 'mov' while patching
      for the same reason. Since mov, add, sub instruction are to patched
      with different constants inside the same stub, the rotation field
      of the opcode is using to differentiate between them.
      
      So the above examples for v2p translation becomes for VA=0xC0000000,
          1) PA[63:32] = 0xffffffff
             PA[31:0] = VA + 0xC0000000 --> results in a carry
             PA[63:32] = PA[63:32] + carry
      
             PA[63:0] = 0x0 80000000
      
          2) PA[63:32] = 0x1
             PA[31:0] = VA + 0xC0000000 --> results in a carry
             PA[63:32] = PA[63:32] + carry
      
             PA[63:0] = 0x2 80000000
      
      The above ideas were suggested by Nicolas Pitre <nico@linaro.org> as
      part of the review of first and second versions of the subject patch.
      
      There is no corresponding change on the phys_to_virt() side, because
      computations on the upper 32-bits would be discarded anyway.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Reviewed-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NSricharan R <r.sricharan@ti.com>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      f52bb722
    • S
      ARM: mm: Move the idmap print to appropriate place in the code · c1a5f4f6
      Santosh Shilimkar 提交于
      Commit 9e9a367c {ARM: Section based HYP idmap} moved
      the address conversion inside identity_mapping_add() without
      respective print which carries useful idmap information.
      
      Move the print as well inside identity_mapping_add() to
      fix the same.
      
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Nicolas Pitre <nico@linaro.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      c1a5f4f6
    • S
      ARM: mm: Introduce virt_to_idmap() with an arch hook · 4dc9a817
      Santosh Shilimkar 提交于
      On some PAE systems (e.g. TI Keystone), memory is above the
      32-bit addressable limit, and the interconnect provides an
      aliased view of parts of physical memory in the 32-bit addressable
      space.  This alias is strictly for boot time usage, and is not
      otherwise usable because of coherency limitations. On such systems,
      the idmap mechanism needs to take this aliased mapping into account.
      
      This patch introduces virt_to_idmap() and a arch function pointer which
      can be populated by platform which needs it. Also populate necessary
      idmap spots with now available virt_to_idmap(). Avoided #ifdef approach
      to be compatible with multi-platform builds.
      
      Most architecture won't touch it and in that case virt_to_idmap()
      fall-back to existing virt_to_phys() macro.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      4dc9a817
    • S
      ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions · ca5a45c0
      Santosh Shilimkar 提交于
      Fix remainder types used when converting back and forth between
      physical and virtual addresses.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      ca5a45c0
  5. 09 10月, 2013 1 次提交
    • W
      ARM: perf: fix group validation for mixed software and hardware groups · 2dfcb802
      Will Deacon 提交于
      Since software events can always be scheduled, perf allows software and
      hardware events to be mixed together in the same event group. There are
      two ways in which this can come about:
      
        (1) A SW event is added to a HW group. This validates using the HW PMU
            of the group leader.
      
        (2) A HW event is added to a SW group. This inserts the SW events and
            the new HW event into a HW context, but the SW event remains the
            group leader.
      
      When validating the latter case, we would ideally compare the PMU of
      each event in the group with the relevant HW PMU. The problem is, in the
      face of potentially multiple HW PMUs, we don't have a handle on the
      relevant structure. Commit 7b9f72c6 ("ARM: perf: clean up event
      group validation") attempting to resolve this issue, but actually made
      things *worse* by comparing with the leader PMU. If the leader is a SW
      event, then we automatically `pass' all the HW events during validation!
      
      This patch removes the check against the leader PMU. Whilst this will
      allow events from multiple HW PMUs to be grouped together, that should
      probably be dealt with in perf core as the result of a later patch.
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      2dfcb802
  6. 07 10月, 2013 2 次提交
  7. 05 10月, 2013 1 次提交
    • A
      ARM: add support for bit sliced AES using NEON instructions · e4e7f10b
      Ard Biesheuvel 提交于
      Bit sliced AES gives around 45% speedup on Cortex-A15 for encryption
      and around 25% for decryption. This implementation of the AES algorithm
      does not rely on any lookup tables so it is believed to be invulnerable
      to cache timing attacks.
      
      This algorithm processes up to 8 blocks in parallel in constant time. This
      means that it is not usable by chaining modes that are strictly sequential
      in nature, such as CBC encryption. CBC decryption, however, can benefit from
      this implementation and runs about 25% faster. The other chaining modes
      implemented in this module, XTS and CTR, can execute fully in parallel in
      both directions.
      
      The core code has been adopted from the OpenSSL project (in collaboration
      with the original author, on cc). For ease of maintenance, this version is
      identical to the upstream OpenSSL code, i.e., all modifications that were
      required to make it suitable for inclusion into the kernel have been made
      upstream. The original can be found here:
      
          http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=6f6a6130
      
      Note to integrators:
      While this implementation is significantly faster than the existing table
      based ones (generic or ARM asm), especially in CTR mode, the effects on
      power efficiency are unclear as of yet. This code does fundamentally more
      work, by calculating values that the table based code obtains by a simple
      lookup; only by doing all of that work in a SIMD fashion, it manages to
      perform better.
      
      Cc: Andy Polyakov <appro@openssl.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      e4e7f10b
  8. 04 10月, 2013 2 次提交
  9. 30 9月, 2013 18 次提交
  10. 29 9月, 2013 7 次提交
    • I
      Revert "perf symbols: Demangle cloned functions" · 14951f22
      Ingo Molnar 提交于
      This reverts commit de95ab53.
      
      Markus Trippelsdorf reported that this commit broke 'perf top':
      
       > I just see a gray screen with no text at all. Sometimes the
       > following error messages are printed:
       >
       >  *** Error in `perf': invalid fastbin entry (free): 0x00000000029b18c0
       >  ***
       >  *** Error in `perf': malloc(): memory corruption (fast): 0x0000000000ee0b10 ***
      
      While this code is fixable, the commit itself fails on several levels:
      
       - it should have been a separate helper function
       - why the heck does it do strchr() twice
       - it casts a const char * over into char *
       - sloppy style
       - it's not even a regression fix!
      
      So lets revert it and re-try the patch in v3.13.
      Reported-by: NMarkus Trippelsdorf <markus@trippelsdorf.de>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      14951f22
    • D
      Merge branch 'msm-fixes-3.12-rc2' of git://people.freedesktop.org/~robclark/linux into drm-fixes · 66544179
      Dave Airlie 提交于
      A small fix + deal with fallout of iommu changes + use new
      drm_gem_dumb_destroy helper.
      
      * 'msm-fixes-3.12-rc2' of git://people.freedesktop.org/~robclark/linux:
        drm/msm: use drm_gem_dumb_destroy helper
        drm/msm: deal with mach/iommu.h removal
        drm/msm: Remove iommu include from mdp4_kms.c
        drm/msm: Odd PTR_ERR usage
      66544179
    • L
      Merge branches 'sched-urgent-for-linus', 'timers-urgent-for-linus' and... · 669fc2f0
      Linus Torvalds 提交于
      Merge branches 'sched-urgent-for-linus', 'timers-urgent-for-linus' and 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
      
      Pull scheduler, timer and x86 fixes from Ingo Molnar:
       - A context tracking ARM build and functional fix
       - A handful of ARM clocksource/clockevent driver fixes
       - An AMD microcode patch level sysfs reporting fixlet
      
      * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        arm: Fix build error with context tracking calls
      
      * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        clocksource: em_sti: Set cpu_possible_mask to fix SMP broadcast
        clocksource: of: Respect device tree node status
        clocksource: exynos_mct: Set IRQ affinity when the CPU goes online
        arm: clocksource: mvebu: Use the main timer as clock source from DT
      
      * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/microcode/AMD: Fix patch level reporting for family 15h
      669fc2f0
    • L
      Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 9b565a80
      Linus Torvalds 提交于
      Pull perf fixes from Ingo Molnar:
       "A couple of tooling fixlets and a PMU detection printout fix"
      
      * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        perf/x86: Fix PMU detection printout when no PMU is detected
        perf symbols: Demangle cloned functions
        perf machine: Fix path unpopulated in machine__create_modules()
        perf tools: Explicitly add libdl dependency
        perf probe: Fix probing symbols with optimization suffix
        perf trace: Add mmap2 handler
        perf kmem: Make it work again on non NUMA machines
      9b565a80
    • L
      Merge tag 'xfs-for-linus-v3.12-rc3' of git://oss.sgi.com/xfs/xfs · ddd23eb1
      Linus Torvalds 提交于
      Pull xfs bugfixes from Ben Myers:
       - fix for directory node collapse regression
       - fix for recovery over stale on disk structures
       - fix for eofblocks ioctl
       - fix asserts in xfs_inode_free
       - lock the ail before removing an item from it
      
      * tag 'xfs-for-linus-v3.12-rc3' of git://oss.sgi.com/xfs/xfs:
        xfs: fix node forward in xfs_node_toosmall
        xfs: log recovery lsn ordering needs uuid check
        xfs: fix XFS_IOC_FREE_EOFBLOCKS definition
        xfs: asserting lock not held during freeing not valid
        xfs: lock the AIL before removing the buffer item
      ddd23eb1
    • L
      Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux · 057d5e98
      Linus Torvalds 提交于
      Pull i2c fixes from Wolfram Sang:
       "Some driver bugfixes for the I2C subsystem"
      
      * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
        i2c: ismt: initialize DMA buffer
        i2c: designware: 10-bit addressing mode enabling if I2C_DYNAMIC_TAR_UPDATE is set
        i2c: mv64xxx: Do not use writel_relaxed()
        i2c: mv64xxx: Fix some build warnings
        i2c: s3c2410: fix clk_disable/clk_unprepare WARNings
      057d5e98
    • L
      Merge tag 'pm+acpi-3.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm · ec220be7
      Linus Torvalds 提交于
      Pull ACPI and power management fixes from Rafael Wysocki:
       "These fix one recent cpufreq regression, a few older bugs that may
        harm users and a kerneldoc typo.
      
        Specifics:
      
         1) After the recent locking changes in the cpufreq core it is
            possible to trigger BUG_ON(!policy) in lock_policy_rwsem_read() if
            cpufreq_get() is called before registering a cpufreq driver.  Fix
            from Viresh Kumar.
      
         2) If intel_pstate has been loaded already, it doesn't make sense to
            do anything in acpi_cpufreq_init() and moreover doing something in
            there in that case may be harmful, so make that function return
            immediately if another cpufreq driver is already present.  From
            Yinghai Lu.
      
         3) The ACPI IPMI driver sometimes attempts to acquire a mutex from
            interrupt context, which can be avoided by replacing that mutex
            with a spinlock.  From Lv Zheng.
      
         4) A NULL pointer may be dereferenced by the exynos5440 cpufreq
            driver if a memory allocation made by it fails.  Fix from Sachin
            Kamat.
      
         5) Hanjun Guo's commit fixes a typo in the kerneldoc comment
            documenting acpi_bus_unregister_driver()"
      
      * tag 'pm+acpi-3.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
        ACPI / scan: fix typo in comments of acpi_bus_unregister_driver()
        cpufreq: exynos5440: Fix potential NULL pointer dereference
        cpufreq: check cpufreq driver is valid and cpufreq isn't disabled in cpufreq_get()
        acpi-cpufreq: skip loading acpi_cpufreq after intel_pstate
        ACPI / IPMI: Fix atomic context requirement of ipmi_msg_handler()
      ec220be7