We regularly have new NAND controller drivers that are making use of
fields/hooks that we want to get rid of but can't because of all the
legacy drivers that we might break if we do.

So, instead of removing those fields/hooks, let's move them to a
sub-struct which is clearly documented as deprecated.

We start with the ->IO_ADDR_{R,W] fields.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one or
remove the mtd_info object when both are passed.

Let's tackle the chip->dev_ready() hook.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one or
remove the mtd_info object when both are passed.

Let's tackle the chip->cmd_ctrl() hook.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one or
remove the mtd_info object when both are passed.

Let's tackle the chip->select_chip() hook.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one or
remove the mtd_info object when both are passed.

Let's tackle all chip->write_xxx() hooks at once.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one or
remove the mtd_info object when both are passed.

Let's tackle all chip->read_xxx() hooks at once.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one.

Now is ecc->correct()'s turn.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one.

Now is ecc->calculate()'s turn.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers and
hooks to take a nand_chip object instead of an mtd_info one.

Now is ecc->hwctl()'s turn.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers to
take a nand_chip object instead of an mtd_info one.

Now is nand_release()'s turn.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Let's make the raw NAND API consistent by patching all helpers to take
a nand_chip object instead of an mtd_info one.

We start with nand_scan().
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Two helpers have been added to the core to do all kind of controller
side configuration/initialization between the detection phase and the
final NAND scan. Implement these hooks so that we can convert the driver
to just use nand_scan() instead of the nand_scan_ident() +
nand_scan_tail() pair.

Also change the unused "struct device *dev" parameter of the driver
structure into a platform device to reuse it in the ->attach_chip()
hook.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com>

If driver doesn't specify parsers it can use that little helper.
Signed-off-by: NRafał Miłecki <rafal@milecki.pl>
Acked-by: NXiaolei Li <xiaolei.li@mediatek.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

uintptr_t should be used when casting a pointer to an unsigned int so
that the code compiles without warnings even on 64-bit architectures.

This is needed if we want to allow selection of this driver when
COMPILE_TEST=y.
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

There is no point in doing this sort of conversion since we can
replace |= by += operations which are perfectly valid on pointers.

This is done in preparation of COMPILE_TEST addition to the NAND_DAVINCI
Kconfig entry, since building for x86 generates several warnings because
of inappropriate u32 <-> void * conversions (pointers are 64-bit large
on x86_64).
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

All platform now use the core_chipsel field in platform data. Stop
using pdev->id in the driver.
Acked-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

NAND itself is an asynchronous interface, it does not have any
clock input. DaVinci NAND driver acquires clock for AEMIF
(asynchronous external memory interface) which is an on-chip
IP to which NAND is connected.

The same clock is also enabled in AEMIF driver (either present
drivers/memory or from machine code for some older platforms).
AEMIF timing must be initialized before NAND can be accessed.
This ensures that AEMIF clock is enabled too.

Remove the superfluous clock acquisition and enable in DaVinci
NAND driver.

Tested on K2L, K2HK, K2E, DA850 EVM, DA850 LCDK in device-tree
boot and DM644x EVM in legacy boot.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

An error after nand_scan_tail() should trigger a nand_cleanup().
The helper mtd_device_register() returns an error code that should
be checked and nand_cleanup() called accordingly.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

As part of the process of sharing more code between different NAND
based devices, we need to move all raw NAND related code to the raw/
subdirectory.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NPeter Pan <peterpandong@micron.com>
Acked-by: NVladimir Zapolskiy <vz@mleia.com>
Acked-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: NWenyou Yang <wenyou.yang@microchip.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NHan Xu <han.xu@nxp.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NShawn Guo <shawnguo@kernel.org>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-By: NHarvey Hunt <harveyhuntnexus@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NKrzysztof Halasa <khalasa@piap.pl>

If ECC strength is 4bits/512bytes the algorithm of the ECC engine is
BCH, otherwise (1bit/512bytes) Hamming is used.
Signed-off-by: NAlexander Couzens <lynxis@fe80.eu>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Add a comment clarifying that NAND subpage write on keystone works,
but is not being enabled in the interest of backward compatibility.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

This fixes subpage writes when using 4-bit HW ECC.

There has been numerous reports about ECC errors with devices using this
driver for a while.  Also the 4-bit ECC has been reported as broken with
subpages in [1] and with 16 bits NANDs in the driver and in mach* board
files both in mainline and in the vendor BSPs.

What I saw with 4-bit ECC on a 16bits NAND (on an LCDK) which got me to
try reinitializing the ECC engine:
- R/W on whole pages properly generates/checks RS code
- try writing the 1st subpage only of a blank page, the subpage is well
  written and the RS code properly generated, re-reading the same page
  the HW detects some ECC error, reading the same page again no ECC
  error is detected

Note that the ECC engine is already reinitialized in the 1-bit case.

Tested on my LCDK with UBI+UBIFS using subpages.
This could potentially get rid of the issue workarounded in [1].

[1] 28c015a9 ("mtd: davinci-nand: disable subpage write for keystone-nand")

Fixes: 6a4123e5 ("mtd: nand: davinci_nand, 4-bit ECC for smallpage")
Cc: <stable@vger.kernel.org>
Signed-off-by: NKarl Beldan <kbeldan@baylibre.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The core now takes care of parsing generic DT properties in
nand_scan_ident() when nand_set_flash_node() has been called.
Rely on this initialization instead of calling of_get_nand_xxx()
manually.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The davinci driver is manually checking for 'erased pages' while
correcting ECC bytes.
This logic can now done by the core infrastructure, and can thus be removed
from this driver.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The error code returned by the ecc.correct() are not consistent over the
all implementations.

Document the expected behavior in include/linux/mtd/nand.h and fix
offending implementations.

[Brian: this looks like a bugfix for the ECC reporting in the bf5xx_nand
driver, but we haven't seen any testing results for it]
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NFranklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

struct nand_chip now embeds an mtd device. Make use of this mtd instance.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all NAND drivers to use it.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

All of these drivers set up a parser data struct just to communicate DT
partition data. This field has been deprecated and is instead supported
by telling nand_scan_ident() about the 'flash_node'.

This patch:
 * sets chip->flash_node for those drivers that didn't already (but used
   OF partitioning)
 * drops the parser data
 * switches to the simpler mtd_device_register() where possible, now
   that we've eliminated one of the auxiliary parameters

Now that we've assigned chip->flash_node for these drivers, we can
probably rely on nand_dt_init() to do more of the DT parsing for us, but
for now, I don't want to fiddle with each of these drivers. The parsing
is done in duplicate for now on some drivers. I don't think this should
break things. (Famous last words.)

(Rolled in some changes by Boris Brezillon)
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Owner and name are automatically set by mtdcore. Make use of that.
Signed-off-by: NFrans Klaver <fransklaver@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

It is needed for k2l keystone2 EVM which uses NAND flash with 4K page
size, hence add support for 4K page size nand devices.

[Brian: similar work submitted by Murali Karicheri <m-karicheri2@ti.com>
and Hao Zhang <hzhang@ti.com>]
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Sub page write doesn't work because of hw issue in controller found on
Keystone SOCs. AEMIF controller is also used on DaVinci SOCs which
don't seems to have any issue. So add "ti,keysone-nand" compatible
to nand driver in order to set NAND_NO_SUBPAGE_WRITE option.

Cc: Warner Losh <imp@bsdimp.com>
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Sub page write doesn't work because of hw issue in controller found on
Keystone SOCs. AEMIF controller is also used on DaVinci SOCs which
don't seems to have any issue. So add "ti,keysone-nand" compatible
to nand driver in order to set NAND_NO_SUBPAGE_WRITE option.

Cc: Warner Losh <imp@bsdimp.com>
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>.  Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
[Brian: dropped one incorrect hunk]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The problem that the set timings code contains the call of Davinci
platform function davinci_aemif_setup_timing() which is not
accessible if kernel is built for another platform like Keystone.

The Keysone platform is going to use TI AEMIF driver.
If TI AEMIF is used we don't need to set timings and bus width.
It is done by AEMIF driver.

To get rid of davinci-nand driver dependency on aemif platform code
we moved aemif code to davinci platform.

The platform AEMIF code (aemif.c) has to be removed once Davinci
will be converted to DT and use ti-aemif.c driver.
Acked-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[nsekhar@ti.com: fixed checkpatch error and a build breakage due to
		 missing include, rebased onto l2-mtd/master]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>