Signed-off-by: NTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Modify clock binding in a common device tree for all Nuvoton
NPCM750 BMCs.

Modify NPCM750 modules clock numbers accourding the new
clock driver.
Signed-off-by: NTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Modify timer register size in a common device tree for all Nuvoton
NPCM750 BMCs.
Signed-off-by: NTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Modify UART compatible name in a common device tree for all Nuvoton
NPCM750 BMCs.
Signed-off-by: NTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add watchdog device node to a common device tree for all Nuvoton
NPCM750 BMCs and a board specific device tree for the NPCM750 (Poleg)
evaluation board.
Signed-off-by: NTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add nodes of the AVE ethernet controller for PXs3 and the boards.
This SoC has two controllers.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add pinctrl groups of ethernet, such as "ether1_rgmii" and "ether1_rmii".
These are used for second ethernet instance.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Follow the recent trend for the license description
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.htmlAcked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: NUwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.htmlAcked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.

As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.htmlAcked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

Add SFP module support for Clearfog using the SFP phylink support.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

The internal RTC does not work correctly on these Linksys boards based
on Marvell SoCs. For me it only shows Wed Dec 31 23:59:59 1969 and for
others it is off by 3 minutes in 10 minutes running, this was reported
by multiple users. On the Linksys Mamba device the device tree comment
says that no crystal is connected to the internal RTC, this is probably
also true for the other devices.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>

The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.

Remove the unused properties from the gpio-fan node.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.

Remove the unused properties from the gpio-fan node.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.

Remove the unused properties from the CPU nodes.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This reverts commit f81d7af7.

As explained by Rob Herring:

"This "fix" is wrong. Memory controllers with chip selects should have
the chip select in the unit-address. The correct fix here is you should
drop "simple-bus"."
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Fixes the warning "GIC: PPI13 is secure or misconfigured" by
changing the interrupt type from level_low to edge_raising
Signed-off-by: NPhilipp Puschmann <pp@emlix.com>
Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>

Disable the USB overcurrent condition that is falsely detected on the
devkit.
Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>

Enables the watchdog0 timer on the Stratix10 devkit.
Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>

For consistency with all other serial pins, add this pullup. It also
prevents the signal from floating and so consuming a useless extra amount
of power in crowbarred state if nothing is connected to RX.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>

For consistency with all other serial pins, add this pullup. It also
prevents the signal from floating and so consuming a useless extra amount
of power in crowbarred state if nothing is connected to RX.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>

Remove pullup on uart TX signals, they are push-pull outputs thus
pullups are pointless.

Add pullup on uart RX signals, they prevent the RX signals to be left
floating and so consuming a useless extra amount of power in crowbarred
state if nothing is connected to RX.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>

There are only 19 PIOB pins having primary names PB0-PB18. Not all of them
have a 'C' function. So the pinctrl property mask ends up being the same as the
other SoC of the at91sam9x5 series.
Reported-by: NMarek Sieranski <marek.sieranski@microchip.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # v3.8+
Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>

Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b
because it only provides 83 GPIOs.
The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h
inherited all GPIOs from Meson8 until recently. However, Meson8b does
not support all GPIOs which are supported by Meson8 (Meson8b doesn't
have a GPIOZ bank, most of the pins from the GPIODV bank are missing on
Meson8b - just to name a few differences).

The actual number of GPIOs is only 83, instead of 120 from Meson8 plus
the 10 GPIOs from the DIF bank on Meson8b.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: NJerome Brunet <jbrunet@baylibre.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The Odroid C1 features a microSD slot. This patch adds the necessary
DT bindings to support it.
Signed-off-by: NLinus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

These are needed to use the n_gsm driver for TS 27.010 UART
multiplexing. Note that support for the OOB wake gpio is still
missing so the UART is not yet usable for n_gsm.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Configure MDM6600 USB PHY.

Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

We have a USB OCHI PHY on port 1 for mdm6600. Port 2 is using transceiverless
logic (TLL) for USB EHCI for w3glte modem.

Let's also fix the node name to use usb-phy while at it.

Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds syscon property for specifying soc-glue core into
device-tree of PXs2 SoC.

Currently, soc-glue core is used for changing the state of S/PDIF
signal output pin to signal output state or Hi-Z state.
Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This patch adds syscon property for specifying soc-glue core into
device-tree of LD11/LD20 SoC.

Currently, soc-glue core is used for changing the state of S/PDIF
signal output pin to signal output state or Hi-Z state.
Signed-off-by: NKatsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The xref_xtal clock is used by twl6040 as mclk. It is needed for the HPPLL
internally.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>