- 20 4月, 2016 18 次提交
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由 Boris Brezillon 提交于
sunxi_nfc_hw_ecc_read_chunk() always retrieves the ECC and protected free bytes, no matter if the user really asked for it or not. This can take a non negligible amount of time, especially on NAND chips exposing large OOB areas (> 1KB). Make it optional. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
In order to support DMA operations in a clean way we need to extract some of the logic coded in sunxi_nfc_hw_ecc_read/write_page() into their own function. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Some NAND operations are so fast that it doesn't make any sense to use interrupt based waits (the scheduling overhead is not worth it). Rename sunxi_nfc_wait_int() into sunxi_nfc_wait_events() and add a parameter to specify whether polling should be used or not. Note that all sunxi_nfc_wait_int() are moved to the polling approach now, but this should change as soon as we have more information about the approximate time we are about to wait (can be extracted from the NAND timings, and the type of operation). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Replace open coded polling loops by readl_poll_timeout() calls. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
->dev_ready() is not supposed to wait for busy to ready solution (this is the role of ->waitfunc()). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
When the NAND controller operates in DMA mode it can pipeline ECC operations which improves the throughput. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
mod and ahb clocks are not disabled when the NAND controller device is removed. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
NFC_PAGE_SHIFT() already takes the real page_shift value and subtract 10 to it. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
NFC_ECC_ERR_CNT() is not taking into account the case when the NAND chip contains more than 4 ECC blocks (NANDs with 4kB+ pages). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
We don't need to manually toggle the CE line since the controller handles it for us. Moreover, keeping the CE line low when interacting with a DDR NAND can be problematic (data loss in some corner cases). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Try to pack address and command cycles into a single NAND controller command to avoid polling the status register for each single change on the NAND bus. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Being able to read subpages can greatly improve read performances if the MTD user is only interested in a small section of a NAND page. This is particularly true with large pages (>= 8k). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Allwinner's ECC engine is capable of protecting a few bytes of the OOB area. Implement specific OOB functions to benefit from this capability. Also, when in raw mode, the randomizer is disabled, which means you'll only be able to retrieve randomized data, which is not really useful for most applications. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Adapt the NAND controller clk rate to the tWB, tADL, tWHR and tRHW timings instead of returning an error when the maximum clk divisor is not big enough to provide an appropriate timing. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
The ONFI spec says that EDO should be enabled if the host drives tRC less than 30ns, but the code just tests for the tRC_min value extracted from the timings exposed by the NAND chip not the timings actually configured in the NAND controller. Fix that by first rounding down the requested clk_rate with clk_round_rate() and then checking if tRC is actually smaller than 30ns. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Unlike what is specified in the Allwinner datasheets, the NAND clock rate is not equal to 2/T but 1/T. Fix the clock rate selection accordingly. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
sunxi_nand_chip_set_timings() is extracting a pointer to the nfc from the nand->controller field, but this field is initialized after sunxi_nand_chip_set_timings() call. Reorder the calls to avoid any problem. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Boris Brezillon 提交于
Some drivers are including linux/of_mtd.h even if they don't use any of the of_get_nand_xxx() helpers. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NHarvey Hunt <harvey.hunt@imgtec.com>
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- 05 3月, 2016 1 次提交
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由 Boris BREZILLON 提交于
mtd->priv is no longer pointing to the struct nand_chip it is attached to. Replace those accesses by mtd_to_nand() calls. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Fixes: 4be4e03e ("mtd: nand: sunxi: add randomizer support") Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 24 1月, 2016 1 次提交
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由 Brian Norris 提交于
Suggested-by: NRichard Weinberger <richard@nod.at> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 23 1月, 2016 1 次提交
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由 Boris BREZILLON 提交于
Add support for the randomizer engine available in Allwinner's NFC IP. Randomization is useful to support modern NAND chips which are sensitive to repeated patterns. On such NANDs you might experience an unexpectedly high number of bitflips when you repeat the same pattern all over a given NAND block. Randomizing input data mitigate this problem by avoiding such repeated patterns. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 19 12月, 2015 2 次提交
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由 Boris BREZILLON 提交于
mtd_to_nand() now uses the container_of() approach to transform an mtd_info pointer into a nand_chip one. Drop useless mtd->priv assignments from NAND controller drivers. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
struct nand_chip now embeds an mtd device. Make use of this mtd instance. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 09 12月, 2015 1 次提交
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由 Boris BREZILLON 提交于
mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all NAND drivers to use it. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 01 12月, 2015 1 次提交
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由 Julia Lawall 提交于
for_each_child_of_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 12 11月, 2015 2 次提交
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由 Brian Norris 提交于
All of these drivers set up a parser data struct just to communicate DT partition data. This field has been deprecated and is instead supported by telling nand_scan_ident() about the 'flash_node'. This patch: * sets chip->flash_node for those drivers that didn't already (but used OF partitioning) * drops the parser data * switches to the simpler mtd_device_register() where possible, now that we've eliminated one of the auxiliary parameters Now that we've assigned chip->flash_node for these drivers, we can probably rely on nand_dt_init() to do more of the DT parsing for us, but for now, I don't want to fiddle with each of these drivers. The parsing is done in duplicate for now on some drivers. I don't think this should break things. (Famous last words.) (Rolled in some changes by Boris Brezillon) Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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由 Brian Norris 提交于
Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci': ---8<---- virtual patch @@ struct nand_chip *c; struct device_node *d; @@ -(c)->flash_node = (d) +nand_set_flash_node(c, d) ---8<---- Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de> Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
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- 03 11月, 2015 2 次提交
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由 Boris BREZILLON 提交于
The in-band data are copied twice: before ECC correction and after the ECC engine has fixed all the fixable bitflips. Drop the useless memcpy_fromio operation by passing a NULL pointer when calling sunxi_nfc_read_buf(). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
The sunxi_nfc_hw_ecc_read/write_chunk() functions try to avoid changing the column address if unnecessary, but the logic to determine whether it's necessary or not is currently wrong: it adds the ecc->bytes value to the current offset where it should actually add ecc->size. Fixes: 913821bd ("mtd: nand: sunxi: introduce sunxi_nfc_hw_ecc_read/write_chunk()") Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 14 10月, 2015 2 次提交
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由 Boris BREZILLON 提交于
The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Frans Klaver 提交于
Owner is automatically set by mtdcore. Make use of that. Signed-off-by: NFrans Klaver <fransklaver@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 03 10月, 2015 7 次提交
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由 Boris BREZILLON 提交于
Use the nand_check_erased_ecc_chunk() function to test if the ECC error was triggered by an erased page containing a few bitflips. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
sunxi_nfc_user_data_to_buf() is exposed as an inline function, replace the NFC_BUF_TO_USER_DATA() macro by an inline function to be consistent. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
The ECC engine is protecting a few OOB bytes. Retrieve them from the USER_DATA register instead of reading them in raw mode (ie without the ECC protection). Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
Add helper functions to factorize the code dealing extra OOB bytes in the normal and syndrome ECC implementations. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
The sunxi_nfc_hw_ecc_read/write_chunk() functions have been created to factorize the code in the normal and syndrome ECC implementation. Make use of them where appropriate. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
The logic behind normal and syndrome ECC handling is pretty much the same, the only difference is the ECC bytes placement. Create two functions to read/write ECC chunks. Those functions will later be used by the sunxi_nfc_hw_ecc_read/write_page() and sunxi_nfc_hw_syndrome_ecc_read/write_page() functions. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Boris BREZILLON 提交于
The code used to enable/disable the hardware ECC engine is repeated in a lot of places. Create two functions to avoid code duplication. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 01 10月, 2015 1 次提交
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由 Boris BREZILLON 提交于
Suffix mask macros with _MSK and add new helper macros to avoid manually shifting values. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 22 9月, 2015 1 次提交
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由 Boris BREZILLON 提交于
The sunxi_nand_chips_cleanup() function is missing a call to list_del() which generates a double free error. Reported-by: NPriit Laes <plaes@plaes.org> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Cc: <stable@vger.kernel.org> # 3.19+ Fixes: 1fef62c1 ("mtd: nand: add sunxi NAND flash controller support") Tested-by: NPriit Laes <plaes@plaes.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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