- 17 4月, 2022 3 次提交
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由 Ansuel Smith 提交于
In an attempt to reduce qca8k_priv space, rework and simplify mdiobus logic. We now declare a mdiobus instead of relying on DSA phy_read/write even if a mdio node is not present. This is all to make the qca8k ops static and not switch specific. With a legacy implementation where port doesn't have a phy map declared in the dts with a mdio node, we declare a 'qca8k-legacy' mdiobus. The conversion logic is used as legacy read and write ops are used instead of the internal one. Also drop the legacy_phy_port_mapping as we now declare mdiobus with ops that already address the workaround. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
Port_sts is a thing of the past for this driver. It was something present on the initial implementation of this driver and parts of the original struct were dropped over time. Using an array of int to store if a port is enabled or not to handle PM operation seems overkill. Switch and use a simple u8 to store the port status where each bit correspond to a port. (bit is set port is enabled, bit is not set, port is disabled) Also add some comments to better describe why we need to track port status. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
DSA set the CPU port based on the largest MTU of all the slave ports. Based on this we can drop the MTU array from qca8k_priv and set the port_change_mtu logic on DSA changing MTU of the CPU port as the switch have a global MTU settingfor each port. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 3月, 2022 1 次提交
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由 Vladimir Oltean 提交于
Drivers might have error messages to propagate to user space, most common being that they support a single mirror port. Propagate the netlink extack so that they can inform user space in a verbal way of their limitations. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 27 2月, 2022 2 次提交
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由 Vladimir Oltean 提交于
As FDB isolation cannot be enforced between VLAN-aware bridges in lack of hardware assistance like extra FID bits, it seems plausible that many DSA switches cannot do it. Therefore, they need to reject configurations with multiple VLAN-aware bridges from the two code paths that can transition towards that state: - joining a VLAN-aware bridge - toggling VLAN awareness on an existing bridge The .port_vlan_filtering method already propagates the netlink extack to the driver, let's propagate it from .port_bridge_join too, to make sure that the driver can use the same function for both. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vladimir Oltean 提交于
For DSA, to encourage drivers to perform FDB isolation simply means to track which bridge does each FDB and MDB entry belong to. It then becomes the driver responsibility to use something that makes the FDB entry from one bridge not match the FDB lookup of ports from other bridges. The top-level functions where the bridge is determined are: - dsa_port_fdb_{add,del} - dsa_port_host_fdb_{add,del} - dsa_port_mdb_{add,del} - dsa_port_host_mdb_{add,del} aka the pre-crosschip-notifier functions. Changing the API to pass a reference to a bridge is not superfluous, and looking at the passed bridge argument is not the same as having the driver look at dsa_to_port(ds, port)->bridge from the ->port_fdb_add() method. DSA installs FDB and MDB entries on shared (CPU and DSA) ports as well, and those do not have any dp->bridge information to retrieve, because they are not in any bridge - they are merely the pipes that serve the user ports that are in one or multiple bridges. The struct dsa_bridge associated with each FDB/MDB entry is encapsulated in a larger "struct dsa_db" database. Although only databases associated to bridges are notified for now, this API will be the starting point for implementing IFF_UNICAST_FLT in DSA. There, the idea is to install FDB entries on the CPU port which belong to the corresponding user port's port database. These are supposed to match only when the port is standalone. It is better to introduce the API in its expected final form than to introduce it for bridges first, then to have to change drivers which may have made one or more assumptions. Drivers can use the provided bridge.num, but they can also use a different numbering scheme that is more convenient. DSA must perform refcounting on the CPU and DSA ports by also taking into account the bridge number. So if two bridges request the same local address, DSA must notify the driver twice, once for each bridge. In fact, if the driver supports FDB isolation, DSA must perform refcounting per bridge, but if the driver doesn't, DSA must refcount host addresses across all bridges, otherwise it would be telling the driver to delete an FDB entry for a bridge and the driver would delete it for all bridges. So introduce a bool fdb_isolation in drivers which would make all bridge databases passed to the cross-chip notifier have the same number (0). This makes dsa_mac_addr_find() -> dsa_db_equal() say that all bridge databases are the same database - which is essentially the legacy behavior. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 2月, 2022 1 次提交
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由 Colin Ian King 提交于
Currently an invalid port throws a WARN_ON warning however invalid uninitialized values in reg and cpu_port_index are being used later on. Fix this by returning -EINVAL for an invalid port value. Addresses clang-scan warnings: drivers/net/dsa/qca8k.c:1981:3: warning: 2nd function call argument is an uninitialized value [core.CallAndMessage] drivers/net/dsa/qca8k.c:1999:9: warning: 2nd function call argument is an uninitialized value [core.CallAndMessage] Fixes: 7544b3ff ("net: dsa: qca8k: move pcs configuration") Signed-off-by: NColin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220224220557.147075-1-colin.i.king@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 25 2月, 2022 3 次提交
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由 Vladimir Oltean 提交于
The main purpose of this change is to create a data structure for a LAG as seen by DSA. This is similar to what we have for bridging - we pass a copy of this structure by value to ->port_lag_join and ->port_lag_leave. For now we keep the lag_dev, id and a reference count in it. Future patches will add a list of FDB entries for the LAG (these also need to be refcounted to work properly). The LAG structure is created using dsa_port_lag_create() and destroyed using dsa_port_lag_destroy(), just like we have for bridging. Because now, the dsa_lag itself is refcounted, we can simplify dsa_lag_map() and dsa_lag_unmap(). These functions need to keep a LAG in the dst->lags array only as long as at least one port uses it. The refcounting logic inside those functions can be removed now - they are called only when we should perform the operation. dsa_lag_dev() is renamed to dsa_lag_by_id() and now returns the dsa_lag structure instead of the lag_dev net_device. dsa_lag_foreach_port() now takes the dsa_lag structure as argument. dst->lags holds an array of dsa_lag structures. dsa_lag_map() now also saves the dsa_lag->id value, so that linear walking of dst->lags in drivers using dsa_lag_id() is no longer necessary. They can just look at lag.id. dsa_port_lag_id_get() is a helper, similar to dsa_port_bridge_num_get(), which can be used by drivers to get the LAG ID assigned by DSA to a given port. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Vladimir Oltean 提交于
The DSA LAG API will be changed to become more similar with the bridge data structures, where struct dsa_bridge holds an unsigned int num, which is generated by DSA and is one-based. We have a similar thing going with the DSA LAG, except that isn't stored anywhere, it is calculated dynamically by dsa_lag_id() by iterating through dst->lags. The idea of encoding an invalid (or not requested) LAG ID as zero for the purpose of simplifying checks in drivers means that the LAG IDs passed by DSA to drivers need to be one-based too. So back-and-forth conversion is needed when indexing the dst->lags array, as well as in drivers which assume a zero-based index. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Vladimir Oltean 提交于
In preparation of converting struct net_device *dp->lag_dev into a struct dsa_lag *dp->lag, we need to rename, for consistency purposes, all occurrences of the "lag" variable in qca8k to "lag_dev". Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 18 2月, 2022 5 次提交
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由 Russell King (Oracle) 提交于
The qca8k driver does not make use of the speed, duplex, pause or advertisement in its phylink_mac_config() implementation, so it can be marked as a non-legacy driver. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
Move the PCS configuration to qca8k_pcs_config(). Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
Convert the qca8k driver to use the phylink_pcs support to talk to the SGMII PCS. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
Move qca8k_phylink_mac_link_state() to separate the code movement from code changes. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Russell King (Oracle) 提交于
Move qca8k_setup() to be later in the file to avoid needing prototypes for called functions. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 2月, 2022 1 次提交
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由 kernel test robot 提交于
drivers/net/dsa/qca8k.c:422:37-43: ERROR: application of sizeof to pointer sizeof when applied to a pointer typed expression gives the size of the pointer Generated by: scripts/coccinelle/misc/noderef.cocci Fixes: 90386223 ("net: dsa: qca8k: add support for larger read/write size with mgmt Ethernet") CC: Ansuel Smith <ansuelsmth@gmail.com> Reported-by: Nkernel test robot <lkp@intel.com> Signed-off-by: Nkernel test robot <lkp@intel.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220209221304.GA17529@d2214a582157Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 05 2月, 2022 1 次提交
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由 Dan Carpenter 提交于
This is a copy and paste bug. It was supposed to check "clear_skb" instead of "write_skb". Fixes: 2cd54856 ("net: dsa: qca8k: add support for phy read/write with mgmt Ethernet") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 2月, 2022 1 次提交
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由 Russell King (Oracle) 提交于
Populate the supported interfaces and MAC capabilities for the QCA8K DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. In making this change, we bring consistency to the ethtool linkmodes that phylink's validate step produces, thereby following the expected behaviour as the phylink documentation has explained. Specifically, the ethtool 1000baseX_Full capability is now permitted for all interface modes, as it is a property of the PHY driver whether 1000baseX fiber connections can be supported. Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 2月, 2022 8 次提交
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由 Ansuel Smith 提交于
Introduce qca8k_bulk_read/write() function to use mgmt Ethernet way to read/write packet in bulk. Make use of this new function in the fdb function and while at it reduce the reg for fdb_read from 4 to 3 as the max bit for the ARL(fdb) table is 83 bits. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
mgmt Ethernet packet can read/write up to 16byte at times. The len reg is limited to 15 (0xf). The switch actually sends and accepts data in 4 different steps of len values. Len steps: - 0: nothing - 1-4: first 4 byte - 5-6: first 12 byte - 7-15: all 16 byte In the alloc skb function we check if the len is 16 and we fix it to a len of 15. It the read/write function interest to extract the real asked data. The tagger handler will always copy the fully 16byte with a READ command. This is useful for some big regs like the fdb reg that are more than 4byte of data. This permits to introduce a bulk function that will send and request the entire entry in one go. Write function is changed and it does now require to pass the pointer to val to also handle array val. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
From Documentation, we can cache lo and hi the same way we do with the page. This massively reduce the mdio write as 3/4 of the time as we only require to write the lo or hi part for a mdio write. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
There can be multiple qca8k switch on the same system. Move the static qca8k_current_page to qca8k_priv and make it specific for each switch. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
Use mgmt Ethernet also for phy read/write if availabale. Use a different seq number to make sure we receive the correct packet. On any error, we fallback to the legacy mdio read/write. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
The switch can autocast MIB counter using Ethernet packet. Add support for this and provide a handler for the tagger. The switch will send packet with MIB counter for each port, the switch will use completion API to wait for the correct packet to be received and will complete the task only when each packet is received. Although the handler will drop all the other packet, we still have to consume each MIB packet to complete the request. This is done to prevent mixed data with concurrent ethtool request. connect_tag_protocol() is used to add the handler to the tag_qca tagger, master_state_change() use the MIB lock to make sure no MIB Ethernet is in progress. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
Add qca8k side support for mgmt read/write in Ethernet packet. qca8k supports some specially crafted Ethernet packet that can be used for mgmt read/write instead of the legacy method uart/internal mdio. This add support for the qca8k side to craft the packet and enqueue it. Each port and the qca8k_priv have a special struct to put data in it. The completion API is used to wait for the packet to be received back with the requested data. The various steps are: 1. Craft the special packet with the qca hdr set to mgmt read/write mode. 2. Set the lock in the dedicated mgmt struct. 3. Increment the seq number and set it in the mgmt pkt 4. Reinit the completion. 5. Enqueue the packet. 6. Wait the packet to be received. 7. Use the data set by the tagger to complete the mdio operation. If the completion timeouts or the ack value is not true, the legacy mdio way is used. It has to be considered that in the initial setup mdio is still used and mdio is still used until DSA is ready to accept and tag packet. tag_proto_connect() is used to fill the required handler for the tagger to correctly parse and elaborate the special Ethernet mdio packet. Locking is added to qca8k_master_change() to make sure no mgmt Ethernet are in progress. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
MDIO/MIB Ethernet require the master port and the tagger availabale to correctly work. Use the new api master_state_change to track when master is operational or not and set a bool in qca8k_priv. We cache the first cached master available and we check if other cpu port are operational when the cached one goes down. This cached master will later be used by mdio read/write and mib request to correctly use the working function. qca8k implementation for MDIO/MIB Ethernet is bad. CPU port0 is the only one that answers with the ack packet or sends MIB Ethernet packets. For this reason the master_state_change ignore CPU port6 and only checks CPU port0 if it's operational and enables this mode. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 12月, 2021 3 次提交
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由 Vladimir Oltean 提交于
This is a preparation patch for the removal of the DSA switch methods ->port_bridge_tx_fwd_offload() and ->port_bridge_tx_fwd_unoffload(). The plan is for the switch to report whether it offloads TX forwarding directly as a response to the ->port_bridge_join() method. This change deals with the noisy portion of converting all existing function prototypes to take this new boolean pointer argument. The bool is placed in the cross-chip notifier structure for bridge join, and a reference to it is provided to drivers. In the next change, DSA will then actually look at this value instead of calling ->port_bridge_tx_fwd_offload(). Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NAlvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Vladimir Oltean 提交于
The main desire behind this is to provide coherent bridge information to the fast path without locking. For example, right now we set dp->bridge_dev and dp->bridge_num from separate code paths, it is theoretically possible for a packet transmission to read these two port properties consecutively and find a bridge number which does not correspond with the bridge device. Another desire is to start passing more complex bridge information to dsa_switch_ops functions. For example, with FDB isolation, it is expected that drivers will need to be passed the bridge which requested an FDB/MDB entry to be offloaded, and along with that bridge_dev, the associated bridge_num should be passed too, in case the driver might want to implement an isolation scheme based on that number. We already pass the {bridge_dev, bridge_num} pair to the TX forwarding offload switch API, however we'd like to remove that and squash it into the basic bridge join/leave API. So that means we need to pass this pair to the bridge join/leave API. During dsa_port_bridge_leave, first we unset dp->bridge_dev, then we call the driver's .port_bridge_leave with what used to be our dp->bridge_dev, but provided as an argument. When bridge_dev and bridge_num get folded into a single structure, we need to preserve this behavior in dsa_port_bridge_leave: we need a copy of what used to be in dp->bridge. Switch drivers check bridge membership by comparing dp->bridge_dev with the provided bridge_dev, but now, if we provide the struct dsa_bridge as a pointer, they cannot keep comparing dp->bridge to the provided pointer, since this only points to an on-stack copy. To make this obvious and prevent driver writers from forgetting and doing stupid things, in this new API, the struct dsa_bridge is provided as a full structure (not very large, contains an int and a pointer) instead of a pointer. An explicit comparison function needs to be used to determine bridge membership: dsa_port_offloads_bridge(). Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NAlvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Vladimir Oltean 提交于
The location of the bridge device pointer and number is going to change. It is not going to be kept individually per port, but in a common structure allocated dynamically and which will have lockdep validation. Use the helpers to access these elements so that we have a migration path to the new organization. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 26 11月, 2021 1 次提交
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由 Colin Ian King 提交于
There is a spelling mistake in a netdev_err error message. Fix it. Signed-off-by: NColin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20211125002932.49217-1-colin.i.king@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 25 11月, 2021 1 次提交
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由 Ansuel Smith 提交于
Fix warning reported by bot. Make sure hash is init to 0 and fix wrong logic for hash_type in qca8k_lag_can_offload. Reported-by: Nkernel test robot <lkp@intel.com> Fixes: def97530 ("net: dsa: qca8k: add LAG support") Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211123154446.31019-1-ansuelsmth@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
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- 23 11月, 2021 2 次提交
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由 Ansuel Smith 提交于
Add LAG support to this switch. In Documentation this is described as trunk mode. A max of 4 LAGs are supported and each can support up to 4 port. The current tx mode supported is Hash mode with both L2 and L2+3 mode. When no port are present in the trunk, the trunk is disabled in the switch. When a port is disconnected, the traffic is redirected to the other available port. The hash mode is global and each LAG require to have the same hash mode set. To change the hash mode when multiple LAG are configured, it's required to remove each LAG and set the desired hash mode to the last. An error is printed when it's asked to set a not supported hadh mode. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
The switch supports mirror mode. Only one port can set as mirror port and every other port can set to both ingress and egress mode. The mirror port is disabled and reverted to normal operation once every port is removed from sending packet to it. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 11月, 2021 7 次提交
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由 Ansuel Smith 提交于
Add support for mdb add/del function. The ARL table is used to insert the rule. The rule will be searched, deleted and reinserted with the port mask updated. The function will check if the rule has to be updated or insert directly with no deletion of the old rule. If every port is removed from the port mask, the rule is removed. The rule is set STATIC in the ARL table (aka it doesn't age) to not be flushed by fast age function. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
qca8k support setting ageing time in step of 7s. Add support for it and set the max value accepted of 7645m. Documentation talks about support for 10000m but that values doesn't make sense as the value doesn't match the max value in the reg. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
The switch supports fast aging by flushing any rule in the ARL table for a specific port. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
We are currently missing 2 additionals MIB counter present in QCA833x switch. QC832x switch have 39 MIB counter and QCA833X have 41 MIB counter. Add the additional MIB counter and rework the MIB function to print the correct supported counter from the match_data struct. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
Convert any qca8k set/clear/pool to regmap helper and add missing config to regmap_config struct. Read/write/rmw operation are reworked to use the regmap helper internally to keep the delta of this patch low. These additional function will then be dropped when the code split will be proposed. Ipq40xx SoC have the internal switch based on the qca8k regmap but use mmio for read/write/rmw operation instead of mdio. In preparation for the support of this internal switch, convert the driver to regmap API to later split the driver to common and specific code. The overhead introduced by the use of regamp API is marginal as the internal mdio will bypass it by using its direct access and regmap will be used only by configuration functions or fdb access. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
In preparation for regmap conversion, move regmap init in the probe function and make it mandatory as any read/write/rmw operation will be converted to regmap API. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ansuel Smith 提交于
Mutex is already init in sw_probe. Remove the extra init in qca8k_setup. Signed-off-by: NAnsuel Smith <ansuelsmth@gmail.com> Reviewed-by: NVladimir Oltean <olteanv@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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