1. 21 8月, 2021 2 次提交
  2. 06 7月, 2021 1 次提交
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  10. 09 4月, 2021 1 次提交
    • S
      cfi: add __cficanonical · ff301ceb
      Sami Tolvanen 提交于
      With CONFIG_CFI_CLANG, the compiler replaces a function address taken
      in C code with the address of a local jump table entry, which passes
      runtime indirect call checks. However, the compiler won't replace
      addresses taken in assembly code, which will result in a CFI failure
      if we later jump to such an address in instrumented C code. The code
      generated for the non-canonical jump table looks this:
      
        <noncanonical.cfi_jt>: /* In C, &noncanonical points here */
      	jmp noncanonical
        ...
        <noncanonical>:        /* function body */
      	...
      
      This change adds the __cficanonical attribute, which tells the
      compiler to use a canonical jump table for the function instead. This
      means the compiler will rename the actual function to <function>.cfi
      and points the original symbol to the jump table entry instead:
      
        <canonical>:           /* jump table entry */
      	jmp canonical.cfi
        ...
        <canonical.cfi>:       /* function body */
      	...
      
      As a result, the address taken in assembly, or other non-instrumented
      code always points to the jump table and therefore, can be used for
      indirect calls in instrumented code without tripping CFI checks.
      Signed-off-by: NSami Tolvanen <samitolvanen@google.com>
      Reviewed-by: NKees Cook <keescook@chromium.org>
      Acked-by: Bjorn Helgaas <bhelgaas@google.com>   # pci.h
      Tested-by: NNathan Chancellor <nathan@kernel.org>
      Signed-off-by: NKees Cook <keescook@chromium.org>
      Link: https://lore.kernel.org/r/20210408182843.1754385-3-samitolvanen@google.com
      ff301ceb
  11. 04 4月, 2021 1 次提交
    • L
      PCI/IOV: Add sysfs MSI-X vector assignment interface · c3d5c2d9
      Leon Romanovsky 提交于
      A typical cloud provider SR-IOV use case is to create many VFs for use by
      guest VMs. The VFs may not be assigned to a VM until a customer requests a
      VM of a certain size, e.g., number of CPUs. A VF may need MSI-X vectors
      proportional to the number of CPUs in the VM, but there is no standard way
      to change the number of MSI-X vectors supported by a VF.
      
      Some Mellanox ConnectX devices support dynamic assignment of MSI-X vectors
      to SR-IOV VFs. This can be done by the PF driver after VFs are enabled,
      and it can be done without affecting VFs that are already in use. The
      hardware supports a limited pool of MSI-X vectors that can be assigned to
      the PF or to individual VFs.  This is device-specific behavior that
      requires support in the PF driver.
      
      Add a read-only "sriov_vf_total_msix" sysfs file for the PF and a writable
      "sriov_vf_msix_count" file for each VF. Management software may use these
      to learn how many MSI-X vectors are available and to dynamically assign
      them to VFs before the VFs are passed through to a VM.
      
      If the PF driver implements the ->sriov_get_vf_total_msix() callback,
      "sriov_vf_total_msix" contains the total number of MSI-X vectors available
      for distribution among VFs.
      
      If no driver is bound to the VF, writing "N" to "sriov_vf_msix_count" uses
      the PF driver ->sriov_set_msix_vec_count() callback to assign "N" MSI-X
      vectors to the VF.  When a VF driver subsequently reads the MSI-X Message
      Control register, it will see the new Table Size "N".
      
      Link: https://lore.kernel.org/linux-pci/20210314124256.70253-2-leon@kernel.orgAcked-by: NBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: NLeon Romanovsky <leonro@nvidia.com>
      c3d5c2d9
  12. 01 4月, 2021 1 次提交
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