1. 19 9月, 2012 2 次提交
    • D
      ARM: virt: allow the kernel to be entered in HYP mode · 80c59daf
      Dave Martin 提交于
      This patch does two things:
      
        * Ensure that asynchronous aborts are masked at kernel entry.
          The bootloader should be masking these anyway, but this reduces
          the damage window just in case it doesn't.
      
        * Enter svc mode via exception return to ensure that CPU state is
          properly serialised.  This does not matter when switching from
          an ordinary privileged mode ("PL1" modes in ARMv7-AR rev C
          parlance), but it potentially does matter when switching from a
          another privileged mode such as hyp mode.
      
      This should allow the kernel to boot safely either from svc mode or
      hyp mode, even if no support for use of the ARM Virtualization
      Extensions is built into the kernel.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      80c59daf
    • M
      ARM: opcodes: add __ERET/__MSR_ELR_HYP instruction encoding · b9a348cb
      Marc Zyngier 提交于
      Enabling boot from HYP mode requires the use of some more
      virt-specific instructions ("eret" and "msr elr_hyp, reg").
      
      Add the necessary encoding to asm/opcode-virt.h.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      b9a348cb
  2. 16 9月, 2012 4 次提交
    • D
      ARM: 7511/1: opcodes: Opcode definitions for the Virtualization Extensions · 508514ed
      Dave Martin 提交于
      For now, this patch just adds a definition for the HVC instruction.
      More can be added here later, as needed.
      
      Now that we have a real example of how to use the opcode injection
      macros properly, this patch also adds a cross-reference from the
      explanation in opcodes.h (since without an example, figuring out
      how to use the macros is not that easy).
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      508514ed
    • D
      ARM: 7510/1: opcodes: Add helpers for emitting custom opcodes · a61a41a0
      Dave Martin 提交于
      This patch adds some __inst_() macros for injecting custom opcodes
      in assembler (both inline and in .S files).  They should make it
      easier and cleaner to get things right in little-/big-
      endian/ARM/Thumb-2 kernels without a lot of #ifdefs.
      
      This pure-preprocessor approach is preferred over the alternative
      method of wedging extra assembler directives into the assembler
      input using top-level asm() blocks, since there is no way to
      guarantee that the compiler won't reorder those with respect to
      each other or with respect to non-toplevel asm() blocks, unless
      -fno-toplevel-reorder is passed (which is in itself somewhat
      undesirable because it defeats some potential optimisations).
      
      Currently <asm/unified.h> _does_ silently rely on the compiler not
      reordering at the top level, but it seems better to avoid adding
      extra code which depends on this if the same result can be achieved
      in another way.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a61a41a0
    • D
      ARM: 7509/1: opcodes: Make opcode byteswapping macros assembly-compatible · 0ce3de23
      Dave Martin 提交于
      Most of the existing macros don't work with assembler, due to the
      use of type casts and C functions from <linux/swab.h>.
      
      This patch abstracts out those operations and provides simple
      explicit versions for use in assembly code.
      
      __opcode_is_thumb32() and __opcode_is_thumb16() are also converted
      to do bitmask-based testing to avoid confusion if these are used in
      assembly code (the assembler typically treats all arithmetic values
      as signed).
      
      These changes avoid the need for the compiler to pre-evaluate
      constant expressions used to generate opcodes.  By ensuring that
      the forms of these expressions can be evaluated directly by the
      assembler, we can just stringify the expressions directly into the
      asm during the preprocessing pass.  The alternative approach
      (passing the evaluated expression via an inline asm "i" constraint)
      gets painful because the contents of the asm and the constraints
      must be kept in sync.  This makes the resulting macros awkward to
      use.
      
      Retaining the C forms of the macros allows more efficient code to
      be generated when opcodes are generated programmatically at run-
      time, but there is no way to embed run-time-generated opcodes in
      asm() blocks.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      0ce3de23
    • D
      ARM: 7508/1: opcodes: Don't define the thumb32 byteswapping macros for BE32 · 57b9da32
      Dave Martin 提交于
      The existing __mem_to_opcode_thumb32() is incorrect for BE32
      platforms.  However, these don't support Thumb-2 kernels, so this
      option is not so relevant for those platforms anyway.
      
      This operation is complicated by the lack of unaligned memory
      access support prior to ARMv6.
      
      Rather than provide a "working" macro which will probably won't get
      used (or worse, will get misused), this patch removes the macro for
      BE32 kernels.  People manipulating Thumb opcodes prior to ARMv6
      should almost certainly be splitting these operations into
      halfwords anyway, using __opcode_thumb32_{first,second,compose}()
      and the 16-bit opcode transformations.
      Signed-off-by: NDave Martin <dave.martin@linaro.org>
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      57b9da32
  3. 06 9月, 2012 1 次提交
  4. 05 9月, 2012 12 次提交
  5. 03 9月, 2012 1 次提交
  6. 31 8月, 2012 3 次提交
  7. 30 8月, 2012 2 次提交
  8. 29 8月, 2012 8 次提交
  9. 28 8月, 2012 2 次提交
  10. 25 8月, 2012 2 次提交
  11. 24 8月, 2012 3 次提交