Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Skip jiffy delay after each block lock/unlock for Intel CFI flash
with the "Instant Individual Block Locking" feature bit set.
Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

oldstate has to be reset to FL_READY after sync completion.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The change makes the code endianess aware and replaces the bogus 
nested loop to or the status flags together.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The OTP code is rather broken without this.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This enables support for reading, writing and locking so called
"Protection Registers" present on some flash chips.
A subset of them are pre-programmed at the factory with a
unique set of values. The rest is user-programmable.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

add structure definition for OTP region info
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!