1. 24 3月, 2020 1 次提交
  2. 21 11月, 2019 10 次提交
  3. 05 9月, 2019 10 次提交
  4. 12 8月, 2019 1 次提交
    • O
      habanalabs: fix endianness handling for internal QMAN submission · b9040c99
      Oded Gabbay 提交于
      The PQs of internal H/W queues (QMANs) can be located in different memory
      areas for different ASICs. Therefore, when writing PQEs, we need to use
      the correct function according to the location of the PQ. e.g. if the PQ
      is located in the device's memory (SRAM or DRAM), we need to use
      memcpy_toio() so it would work in architectures that have separate
      address ranges for IO memory.
      
      This patch makes the code that writes the PQE to be ASIC-specific so we
      can handle this properly per ASIC.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      Tested-by: NBen Segal <bpsegal20@gmail.com>
      b9040c99
  5. 29 7月, 2019 1 次提交
  6. 01 7月, 2019 2 次提交
  7. 29 5月, 2019 1 次提交
    • O
      habanalabs: add MMU mappings for Goya CPU · 95b5a8b8
      Oded Gabbay 提交于
      This patch adds the necessary MMU mappings for the Goya CPU to access the
      device DRAM and the host memory.
      
      The first 256MB of the device DRAM is being mapped. That's where the F/W
      is running.
      
      The 2MB area located on the host memory for the purpose of communication
      between the driver and the device CPU is also being mapped.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      95b5a8b8
  8. 25 5月, 2019 1 次提交
    • O
      habanalabs: halt debug engines on user process close · 89225ce4
      Omer Shpigelman 提交于
      This patch fix a potential bug where a user's process has closed
      unexpectedly without disabling the debug engines. In that case, the debug
      engines might continue running but because the user's MMU mappings are
      going away, we will get page fault errors.
      
      This behavior is also opposed to the general rule where nothing runs on
      the device after the user process closes.
      
      The patch stops the debug H/W engines upon process termination and thus
      makes sure nothing runs on the device after the process goes away.
      Signed-off-by: NOmer Shpigelman <oshpigelman@habana.ai>
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      89225ce4
  9. 17 5月, 2019 1 次提交
    • O
      habanalabs: don't limit packet size for device CPU · cbb10f1e
      Oded Gabbay 提交于
      This patch removes a limitation on the maximum packet size that is read by
      the device CPU as that limitation is not needed.
      
      Therefore, the patch also removes an elaborate calculation that is based
      on this limitation which is also not needed now. Instead, use a fixed
      value for the memory pool size of the packets.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      cbb10f1e
  10. 13 5月, 2019 1 次提交
  11. 12 5月, 2019 1 次提交
  12. 09 5月, 2019 1 次提交
    • O
      habanalabs: change polling functions to macros · a08b51a9
      Oded Gabbay 提交于
      This patch changes two polling functions to macros, in order to make their
      API the same as the standard readl_poll_timeout so we would be able to
      define the "condition for exit" when calling these macros.
      
      This will simplify the code as it will eliminate the need to check both
      for timeout and for the (cond) in the calling function.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      a08b51a9
  13. 04 5月, 2019 1 次提交
    • O
      habanalabs: force user to set device debug mode · 19734970
      Oded Gabbay 提交于
      This patch adds the implementation of the HL_DEBUG_OP_SET_MODE opcode in
      the DEBUG IOCTL.
      
      It forces the user who wants to debug the device to set the device into
      debug mode before he can configure the debug engines. The patch also makes
      sure to disable debug mode upon user releasing FD, in case the user forgot
      to disable debug mode.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      19734970
  14. 05 5月, 2019 1 次提交
  15. 30 4月, 2019 1 次提交
  16. 01 5月, 2019 3 次提交
  17. 29 4月, 2019 1 次提交
    • T
      habanalabs: Use single pool for CPU accessible host memory · 03d5f641
      Tomer Tayar 提交于
      The device's CPU accessible memory on host is managed in a dedicated
      pool, except for 2 regions - Primary Queue (PQ) and Event Queue (EQ) -
      which are allocated from generic DMA pools.
      Due to address length limitations of the CPU, the addresses of all these
      memory regions must have the same MSBs starting at bit 40.
      This patch modifies the allocation of the PQ and EQ to be also from the
      dedicated pool, to ensure compliance with the limitation.
      Signed-off-by: NTomer Tayar <ttayar@habana.ai>
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      03d5f641
  18. 28 4月, 2019 1 次提交
    • O
      habanalabs: return old dram bar address upon change · a38693d7
      Oded Gabbay 提交于
      This patch changes the ASIC interface function that changes the DRAM bar
      window. The change is to return the old address that the DRAM bar pointed
      to instead of an error code.
      
      This simplifies the code that use this function (mainly in debugfs) to
      restore the bar to the old setting.
      
      This is also needed for easier support in future ASICs.
      Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com>
      a38693d7
  19. 26 4月, 2019 1 次提交