1. 03 5月, 2019 4 次提交
    • T
      usb: dwc3: Fix default lpm_nyet_threshold value · 8d791929
      Thinh Nguyen 提交于
      The max possible value for DCTL.LPM_NYET_THRES is 15 and not 255. Change
      the default value to 15.
      
      Cc: stable@vger.kernel.org
      Fixes: 80caf7d2 ("usb: dwc3: add lpm erratum support")
      Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      8d791929
    • T
      usb: dwc3: Do core validation early on probe · b873e2d0
      Thinh Nguyen 提交于
      The setting of the dr_mode may need to check the controller's revision.
      The revision is set in the dwc3_core_is_valid(), which comes after
      dr_mode setting. Let's move it closer to the start of the dwc3_probe()
      function and before calling dwc3_get_dr_mode().
      Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      b873e2d0
    • M
      usb: dwc3: move synchronize_irq() out of the spinlock protected block · 41a91c60
      Marek Szyprowski 提交于
      dwc3_gadget_suspend() is called under dwc->lock spinlock. In such context
      calling synchronize_irq() is not allowed. Move the problematic call out
      of the protected block to fix the following kernel BUG during system
      suspend:
      
      BUG: sleeping function called from invalid context at kernel/irq/manage.c:112
      in_atomic(): 1, irqs_disabled(): 128, pid: 1601, name: rtcwake
      6 locks held by rtcwake/1601:
       #0: f70ac2a2 (sb_writers#7){.+.+}, at: vfs_write+0x130/0x16c
       #1: b5fe1270 (&of->mutex){+.+.}, at: kernfs_fop_write+0xc0/0x1e4
       #2: 7e597705 (kn->count#60){.+.+}, at: kernfs_fop_write+0xc8/0x1e4
       #3: 8b3527d0 (system_transition_mutex){+.+.}, at: pm_suspend+0xc4/0xc04
       #4: fc7f1c42 (&dev->mutex){....}, at: __device_suspend+0xd8/0x74c
       #5: 4b36507e (&(&dwc->lock)->rlock){....}, at: dwc3_gadget_suspend+0x24/0x3c
      irq event stamp: 11252
      hardirqs last  enabled at (11251): [<c09c54a4>] _raw_spin_unlock_irqrestore+0x6c/0x74
      hardirqs last disabled at (11252): [<c09c4d44>] _raw_spin_lock_irqsave+0x1c/0x5c
      softirqs last  enabled at (9744): [<c0102564>] __do_softirq+0x3a4/0x66c
      softirqs last disabled at (9737): [<c0128528>] irq_exit+0x140/0x168
      Preemption disabled at:
      [<00000000>]   (null)
      CPU: 7 PID: 1601 Comm: rtcwake Not tainted
      5.0.0-rc3-next-20190122-00039-ga3f4ee4f8a52 #5252
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      [<c01110f0>] (unwind_backtrace) from [<c010d120>] (show_stack+0x10/0x14)
      [<c010d120>] (show_stack) from [<c09a4d04>] (dump_stack+0x90/0xc8)
      [<c09a4d04>] (dump_stack) from [<c014c700>] (___might_sleep+0x22c/0x2c8)
      [<c014c700>] (___might_sleep) from [<c0189d68>] (synchronize_irq+0x28/0x84)
      [<c0189d68>] (synchronize_irq) from [<c05cbbf8>] (dwc3_gadget_suspend+0x34/0x3c)
      [<c05cbbf8>] (dwc3_gadget_suspend) from [<c05bd020>] (dwc3_suspend_common+0x154/0x410)
      [<c05bd020>] (dwc3_suspend_common) from [<c05bd34c>] (dwc3_suspend+0x14/0x2c)
      [<c05bd34c>] (dwc3_suspend) from [<c051c730>] (platform_pm_suspend+0x2c/0x54)
      [<c051c730>] (platform_pm_suspend) from [<c05285d4>] (dpm_run_callback+0xa4/0x3dc)
      [<c05285d4>] (dpm_run_callback) from [<c0528a40>] (__device_suspend+0x134/0x74c)
      [<c0528a40>] (__device_suspend) from [<c052c508>] (dpm_suspend+0x174/0x588)
      [<c052c508>] (dpm_suspend) from [<c0182134>] (suspend_devices_and_enter+0xc0/0xe74)
      [<c0182134>] (suspend_devices_and_enter) from [<c0183658>] (pm_suspend+0x770/0xc04)
      [<c0183658>] (pm_suspend) from [<c0180ddc>] (state_store+0x6c/0xcc)
      [<c0180ddc>] (state_store) from [<c09a9a70>] (kobj_attr_store+0x14/0x20)
      [<c09a9a70>] (kobj_attr_store) from [<c02d6800>] (sysfs_kf_write+0x4c/0x50)
      [<c02d6800>] (sysfs_kf_write) from [<c02d594c>] (kernfs_fop_write+0xfc/0x1e4)
      [<c02d594c>] (kernfs_fop_write) from [<c02593d8>] (__vfs_write+0x2c/0x160)
      [<c02593d8>] (__vfs_write) from [<c0259694>] (vfs_write+0xa4/0x16c)
      [<c0259694>] (vfs_write) from [<c0259870>] (ksys_write+0x40/0x8c)
      [<c0259870>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
      Exception stack(0xed55ffa8 to 0xed55fff0)
      ...
      
      Fixes: 01c10880 ("usb: dwc3: gadget: synchronize_irq dwc irq in suspend")
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      41a91c60
    • A
      usb: dwc3: Free resource immediately after use · 75ecb9dd
      Andy Shevchenko 提交于
      When we read an array of integers from device properties,
      the temporary buffer is allocated.
      
      However, in case of dwc3_set_incr_burst_type() it's not freed.
      Free allocated buffer immediately after use.
      Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      75ecb9dd
  2. 26 11月, 2018 6 次提交
  3. 06 11月, 2018 1 次提交
  4. 02 10月, 2018 1 次提交
  5. 30 7月, 2018 3 次提交
  6. 18 6月, 2018 1 次提交
  7. 16 5月, 2018 1 次提交
    • M
      usb: dwc3: support clocks and resets for DWC3 core · fe8abf33
      Masahiro Yamada 提交于
      Historically, the clocks and resets are handled on the glue layer
      side instead of the DWC3 core.  For simple cases, dwc3-of-simple.c
      takes care of arbitrary number of clocks and resets.  The DT node
      structure typically looks like as follows:
      
        dwc3-glue {
                compatible = "foo,dwc3";
                clocks = ...;
                resets = ...;
                ...
      
                dwc3 {
                        compatible = "snps,dwc3";
                        ...
                };
        }
      
      By supporting the clocks and the reset in the dwc3/core.c, it will
      be turned into a single node:
      
        dwc3 {
                compatible = "foo,dwc3", "snps,dwc3";
                clocks = ...;
                resets = ...;
                ...
        }
      
      This commit adds the binding of clocks and resets specific to this IP.
      The number of clocks should generally be the same across SoCs, it is
      just some SoCs either tie clocks together or do not provide software
      control of some of the clocks.
      
      I took the clock names from the Synopsys datasheet: "ref" (ref_clk),
      "bus_early" (bus_clk_early), and "suspend" (suspend_clk).
      
      I found only one reset line in the datasheet, hence the reset-names
      property is omitted.
      
      Those clocks are required for new platforms.  Enforcing the new
      binding breaks existing platforms since they specify clocks (and
      resets) in their glue layer node, but nothing in the core node.
      I listed such exceptional cases in the DT binding.  The driver
      code has been relaxed to accept no clock.  This change is based
      on the discussion [1].
      
      I inserted reset_control_deassert() and clk_bulk_enable() before the
      first register access, i.e. dwc3_cache_hwparams().
      
      [1] https://patchwork.kernel.org/patch/10284265/Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      fe8abf33
  8. 15 5月, 2018 2 次提交
  9. 22 3月, 2018 3 次提交
  10. 13 3月, 2018 2 次提交
  11. 28 2月, 2018 1 次提交
  12. 15 2月, 2018 1 次提交
    • R
      usb: dwc3: core: Fix ULPI PHYs and prevent phy_get/ulpi_init during suspend/resume · 98112041
      Roger Quadros 提交于
      In order for ULPI PHYs to work, dwc3_phy_setup() and dwc3_ulpi_init()
      must be doene before dwc3_core_get_phy().
      
      commit 541768b0 ("usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys")
      broke this.
      
      The other issue is that dwc3_core_get_phy() and dwc3_ulpi_init() should
      be called only once during the life cycle of the driver. However,
      as dwc3_core_init() is called during system suspend/resume it will
      result in multiple calls to dwc3_core_get_phy() and dwc3_ulpi_init()
      which is wrong.
      
      Fix this by moving dwc3_ulpi_init() out of dwc3_phy_setup()
      into dwc3_core_ulpi_init(). Use a flag 'ulpi_ready' to ensure that
      dwc3_core_ulpi_init() is called only once from dwc3_core_init().
      
      Use another flag 'phys_ready' to call dwc3_core_get_phy() only once from
      dwc3_core_init().
      
      Fixes: 541768b0 ("usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys")
      Fixes: f54edb53 ("usb: dwc3: core: initialize ULPI before trying to get the PHY")
      Cc: linux-stable <stable@vger.kernel.org> # >= v4.13
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      98112041
  13. 12 2月, 2018 2 次提交
  14. 29 12月, 2017 1 次提交
    • V
      phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 · d8c80bb3
      Vivek Gautam 提交于
      Adding phy calibration sequence for USB 3.0 DRD PHY present on
      Exynos5420/5800 systems.
      This calibration facilitates setting certain PHY parameters viz.
      the Loss-of-Signal (LOS) Detector Threshold Level, as well as
      Tx-Vboost-Level for Super-Speed operations.
      Additionally we also set proper time to wait for RxDetect measurement,
      for desired PHY reference clock, so as to solve issue with enumeration
      of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive
      on the controller.
      
      We are using CR_port for this purpose to send required data
      to override the LOS values.
      
      On testing with USB 3.0 devices on USB 3.0 port present on
      SMDK5420, and peach-pit boards should see following message:
      usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd
      
      and without this patch, should see below shown message:
      usb 1-1: new high-speed USB device number 2 using xhci-hcd
      
      [Also removed unnecessary extra lines in the register macro definitions]
      Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
      [adapted to use phy_calibrate as entry point]
      Signed-off-by: NAndrzej Pietrasiewicz <andrzej.p@samsung.com>
      Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      d8c80bb3
  15. 11 12月, 2017 1 次提交
    • R
      usb: dwc3: Allow disabling of metastability workaround · 42bf02ec
      Roger Quadros 提交于
      Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
      with the metastability workaround as it supports only
      a High-Speed PHY and the PHY can enter into an Erratic state [1]
      when the controller is set in SuperSpeed mode as part of
      the metastability workaround.
      
      This causes upto 2 seconds delay in enumeration on DRA7's USB2
      instance in gadget mode.
      
      If these platforms can be better off without the workaround,
      provide a device tree property to suggest that so the workaround
      is avoided.
      
      [1] Device mode enumeration trace showing PHY Erratic Error.
           irq/90-dwc3-969   [000] d...    52.323145: dwc3_event: event (00000901): Erratic Error [U0]
           irq/90-dwc3-969   [000] d...    52.560646: dwc3_event: event (00000901): Erratic Error [U0]
           irq/90-dwc3-969   [000] d...    52.798144: dwc3_event: event (00000901): Erratic Error [U0]
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      42bf02ec
  16. 07 11月, 2017 1 次提交
    • G
      USB: dwc3: Remove redundant license text · b5ea4757
      Greg Kroah-Hartman 提交于
      Now that the SPDX tag is in all USB files, that identifies the license
      in a specific and legally-defined manner.  So the extra GPL text wording
      can be removed as it is no longer needed at all.
      
      This is done on a quest to remove the 700+ different ways that files in
      the kernel describe the GPL license text.  And there's unneeded stuff
      like the address (sometimes incorrect) for the FSF which is never
      needed.
      
      No copyright headers or other non-license-description text was removed.
      
      Cc: Kukjin Kim <kgene@kernel.org>
      Cc: Krzysztof Kozlowski <krzk@kernel.org>
      Cc: Patrice Chotard <patrice.chotard@st.com>
      Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b5ea4757
  17. 04 11月, 2017 1 次提交
  18. 24 10月, 2017 3 次提交
  19. 17 7月, 2017 1 次提交
    • V
      usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys · 541768b0
      Vignesh R 提交于
      commit f54edb53 ("usb: dwc3: core: initialize ULPI before trying to
      get the PHY") moved call to dwc3_core_get_phy() from dwc3_probe() to
      dwc3_core_init() after dwc3_core_soft_reset(). But
      dwc3_core_soft_reset() calls phy_init(), therefore dwc3_core_get_phy()
      needs to be called before dwc3_core_soft_reset().
      
      Fix this by moving call to dwc3_core_get_phy() before
      dwc3_core_soft_reset().
      
      This fixes the following abort seen on DRA7xx platforms
      [   24.769118] usb usb2: SerialNumber: xhci-hcd.1.auto
      [   24.781144] hub 2-0:1.0: USB hub found
      [   24.787836] hub 2-0:1.0: 1 port detected
      [   24.809939] Unhandled fault: imprecise external abort (0x1406) at 0x00000000
      Reported-by: NCarlos Hernandez <ceh@ti.com>
      Signed-off-by: NVignesh R <vigneshr@ti.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      541768b0
  20. 13 6月, 2017 2 次提交
  21. 17 5月, 2017 1 次提交
    • W
      usb: dwc3: add disable u2mac linestate check quirk · 65db7a0c
      William Wu 提交于
      This patch adds a quirk to disable USB 2.0 MAC linestate check
      during HS transmit. Refer the dwc3 databook, we can use it for
      some special platforms if the linestate not reflect the expected
      line state(J) during transmission.
      
      When use this quirk, the controller implements a fixed 40-bit
      TxEndDelay after the packet is given on UTMI and ignores the
      linestate during the transmit of a token (during token-to-token
      and token-to-data IPGAP).
      
      On some rockchip platforms (e.g. rk3399), it requires to disable
      the u2mac linestate check to decrease the SSPLIT token to SETUP
      token inter-packet delay from 566ns to 466ns, and fix the issue
      that FS/LS devices not recognized if inserted through USB 3.0 HUB.
      Acked-by: NRob Herring <robh@kernel.org>
      Reviewed-by: NGuenter Roeck <groeck@chromium.org>
      Signed-off-by: NWilliam Wu <william.wu@rock-chips.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      65db7a0c
  22. 11 4月, 2017 1 次提交
    • R
      usb: dwc3: Add dual-role support · 9840354f
      Roger Quadros 提交于
      If dr_mode is "otg" then support dual role mode of operation.
      Currently this mode is only supported when an extcon handle is
      present in the dwc3 device tree node. This is needed to
      get the ID status events of the port.
      
      We're using a workqueue to manage the dual-role state transitions
      as the extcon notifier (dwc3_drd_notifier) is called in an atomic
      context by extcon_sync() and this doesn't go well with
      usb_del_gadget_udc() causing a lockdep and softirq warning.
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      9840354f