- 27 10月, 2022 1 次提交
-
-
由 Lucas Stach 提交于
stable inclusion from stable-v5.10.127 commit 59fdf108144c046e39e8ecb0dade7426fde772a6 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I5XDDK Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=59fdf108144c046e39e8ecb0dade7426fde772a6 -------------------------------- commit 93a8ba2a upstream. Contrary to what was believed at the time, the ramp delay of 150us is not plenty for the PU LDO with the default step time of 512 pulses of the 24MHz clock. Measurements have shown that after enabling the LDO the voltage on VDDPU_CAP jumps to ~750mV in the first step and after that the regulator executes the normal ramp up as defined by the step size control. This means it takes the regulator between 360us and 370us to ramp up to the nominal 1.15V voltage for this power domain. With the old setting of the ramp delay the power up of the PU GPC domain would happen in the middle of the regulator ramp with the voltage being at around 900mV. Apparently this was enough for most units to properly power up the peripherals in the domain and execute the reset. Some units however, fail to power up properly, especially when the chip is at a low temperature. In that case any access to the GPU registers would yield an incorrect result with no way to recover from this situation. Change the ramp delay to 380us to cover the measured ramp up time with a bit of additional slack. Fixes: 40130d32 ("ARM: dts: imx6qdl: Allow disabling the PU regulator, add a enable ramp delay") Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com> Reviewed-by: NWei Li <liwei391@huawei.com>
-
- 05 9月, 2020 1 次提交
-
-
由 Marco Felsch 提交于
Like the other i-MX devices the i.MX6 family can output the enet tx clock on the pad to feed the connected device. Add the missing clk here to avoid local fixups like: arch/arm/boot/dts/imx6qdl-tx6.dtsi. Signed-off-by: NMarco Felsch <m.felsch@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 22 8月, 2020 1 次提交
-
-
由 Anson Huang 提交于
Change i.MX SoCs nand node name from "gpmi-nand" to "nand-controller" to be compliant with yaml schema, it requires the nodename to be "nand-controller". Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 13 7月, 2020 6 次提交
-
-
由 Uwe Kleine-König 提交于
The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Krzysztof Kozlowski 提交于
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, so remove it from GPC node. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NFugang Duan <fugang.duan@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW perspective, so it should be a child node of anatop. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 27 5月, 2020 1 次提交
-
-
由 Fugang Duan 提交于
- Update the imx6qdl gpr property to define gpr register offset and bit in DT. - Add imx6sx/imx6ul/imx7d ethernet stop mode property. Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NFugang Duan <fugang.duan@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 20 5月, 2020 2 次提交
-
-
由 Anson Huang 提交于
Node name should be generic, use "reset-controller" instead of "src" for i.MX6/i.MX7 SoCs src nodes. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Although ocotp clock is always ON for i.MX6QDL, OCOTP can be accessed directly, but since i.MX6QDL nvmem interface is supported, and fsl,tempmon-data is deprecated, use it instead of getting fuse data by reading ocotp directly, this makes all i.MX6 SoCs aligned. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 08 4月, 2020 2 次提交
-
-
由 Martin Fuzzey 提交于
This is required for wake on lan on i.MX6 Signed-off-by: NMartin Fuzzey <martin.fuzzey@flowbird.group> Reviewed-by: NFugang Duan <fugang.duan@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Martin Fuzzey 提交于
In order to wake from suspend by ethernet magic packets the GPC must be used as intc does not have wakeup functionality. But the FEC DT node currently uses interrupt-extended, specificying intc, thus breaking WoL. This problem is probably fallout from the stacked domain conversion as intc used to chain to GPC. So replace "interrupts-extended" by "interrupts" to use the default parent which is GPC. Fixes: b923ff6a ("ARM: imx6: convert GPC to stacked domains") Signed-off-by: NMartin Fuzzey <martin.fuzzey@flowbird.group> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 16 3月, 2020 1 次提交
-
-
由 Peng Fan 提交于
Add nvmem related property for cpu0, then nvmem API could be used to read cpu speed grading to avoid directly read OCOTP registers mapped which could not handle defer probe. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 11 3月, 2020 2 次提交
-
-
由 Horia Geantă 提交于
crypto node should use the "crypto" generic naming, and not a specific one ("sahara", "dcp", "caam"). Child nodes of the crypto node for caam crypto engine should use the "jr" name (without an index), as indicated in the DT binding. Signed-off-by: NHoria Geantă <horia.geanta@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Node name should be generic, use "pinctrl" instead of "iomuxc" for all i.MX6/7 SoCs. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 24 2月, 2020 2 次提交
-
-
由 Anson Huang 提交于
Node name should be generic, use "ocotp-ctrl" instead of "ocotp" for all i.MX6 SoCs. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Node name should be generic, use "watchdog" instead of "wdog" for wdog nodes. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 17 2月, 2020 4 次提交
-
-
由 Anson Huang 提交于
Node name should be generic, use "clock-controller" instead of "ccm" for clks node. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Node name should be generic, use "keypad" instead of "kpp" for kpp node. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Node name should be generic, use "timer" instead of "gpt" for gpt node. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Peng Fan 提交于
Per devicetree specification, generic names are recommended to be used, such as bus. i.MX AIPS is a AHB - IP bridge bus, so we could use bus as node name. Script: sed -i "s/\<aips@/bus@/" arch/arm/boot/dts/imx*.dtsi sed -i "s/\<aips@/bus@/" arch/arm/boot/dts/vf*.dtsi sed -i "s/\<aips-bus@/bus@/" arch/arm/boot/dts/imx*.dtsi sed -i "s/\<aips-bus@/bus@/" arch/arm/boot/dts/vf*.dtsi Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 19 8月, 2019 2 次提交
-
-
由 Marco Felsch 提交于
Since commit fe2585e9 ("doc: dt: mtd: support partitions in a special 'partitions' subnode") and commit 5cfdedb7 ("mtd: ofpart: move ofpart partitions to a dedicated dt node") the partitioning should be within a partitions sub-node. Baseboard device trees following that scheme will get a dtc warning due to the predefined #address-cells and #size-cells properties: arch/arm/boot/dts/imx6qdl.dtsi:171.26-189.5: Warning (avoid_unnecessary_addr_size): /soc/gpmi-nand@112000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property I found no upstream imx6 baseboard using the old partitioning scheme, so we can drop the two properties to avoid such warnings. Signed-off-by: NMarco Felsch <m.felsch@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Marco Felsch 提交于
Replace it to fix the following DTC warnings: arch/arm/boot/dts/imx6qdl.dtsi:702.19-715.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-1p1: missing or empty reg/ranges property arch/arm/boot/dts/imx6qdl.dtsi:717.19-730.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-3p0: missing or empty reg/ranges property arch/arm/boot/dts/imx6qdl.dtsi:732.19-745.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-2p5: missing or empty reg/ranges property arch/arm/boot/dts/imx6qdl.dtsi:747.32-762.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore: missing or empty reg/ranges property arch/arm/boot/dts/imx6qdl.dtsi:764.29-779.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu: missing or empty reg/ranges property arch/arm/boot/dts/imx6qdl.dtsi:781.31-796.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc: missing or empty reg/ranges property Signed-off-by: NMarco Felsch <m.felsch@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 18 6月, 2019 1 次提交
-
-
由 Anson Huang 提交于
The SNVS power key depends on board design, by default it should be disabled in SoC DT and ONLY be enabled on board DT if it is wired up. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 20 5月, 2019 2 次提交
-
-
由 Anson Huang 提交于
On i.MX6Q/DL SabreSD board, vgen5 supplies vdd1p1/vdd2p5 LDO and sw2 supplies vdd3p0 LDO, this patch assigns corresponding power supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log: vdd1p1: supplied by regulator-dummy vdd3p0: supplied by regulator-dummy vdd2p5: supplied by regulator-dummy With this patch, the power supply is more accurate: vdd1p1: supplied by VGEN5 vdd3p0: supplied by SW2 vdd2p5: supplied by VGEN5 Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
i.MX6Q/DL's WDOGs use IMX6QDL_CLK_IPG as clock root, assign IMX6QDL_CLK_IPG to them instead of IMX6QDL_CLK_DUMMY. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 11 4月, 2019 1 次提交
-
-
由 Andrey Smirnov 提交于
Since 25aaa75d SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality(this at least breaks RAVE SP serdev driver on RDU2). Fix the code to specify IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: NLucas Stach <l.stach@pengutronix.de> Cc: Angus Ainslie (Purism) <angus@akkea.ca> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Tested-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 03 4月, 2019 1 次提交
-
-
由 Andrey Smirnov 提交于
i.MX6 comes with 4 viewports, so configure PCIE node accordingly so that the driver won't assume we only have 2. Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 21 3月, 2019 2 次提交
-
-
由 Anson Huang 提交于
Add MMDC1 compatible string which is missing, and also set it to be disabled by default, as most of the platforms ONLY use single channel MMDC0, if dual MMDC channels are used, it can be enabled in board dts file. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Anson Huang 提交于
Node name should be generic, so use "memory-controller" instead of "mmdc" for MMDC node name, also remove "mmdc" label for platforms with single MMDC node. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 20 3月, 2019 1 次提交
-
-
由 Adam Ford 提交于
The imx6q Technical reference manual shows the interrupt is available to wake from sleep using the power button. The driver has been available for quite some time, and other variants of the i.MX6 have it enabled, so this implements it much like the others. Signed-off-by: NAdam Ford <aford173@gmail.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 10 12月, 2018 3 次提交
-
-
由 Marco Franchi 提交于
Boards based on imx6qdl have duplicate memory nodes: - One coming from the board device tree file: memory@ - One coming from the imx6qdl.dtsi file. Fix the duplication by removing the memory node from the imx6qdl.dtsi file and by adding 'device_type = "memory";' in the board Device Tree. Converted using the following command: perl -p0777i -e 's/memory\@10000000 \{\n/memory\@10000000 \{\n\t\tdevice_type = \"memory\";\n/m' `find ./arch/arm/boot/dts -name "imx6*"`` Reported-by: NRob Herring <robh@kernel.org> Signed-off-by: NMarco Franchi <marco.franchi@nxp.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Aisheng Dong 提交于
Add stop-mode property which is required by stop mode wakeup feature. Signed-off-by: NAisheng Dong <aisheng.dong@nxp.com> Signed-off-by: NJoakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Frieder Schrempf 提交于
Some SOCs in the i.MX6 family have a USB host controller that is only capable of the HSIC interface and has no on-board PHY. To be able to use these controllers, we need to add "usb-nop-xceiv" dummy PHYs. Signed-off-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: NFabio Estevam <festevam@gmail.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 16 11月, 2018 1 次提交
-
-
由 Lucas Stach 提交于
This allows a board to specify a custom thermal zone configuration involving the SoC internal sensor, CPU and GPU nodes without having to change those nodes. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 05 11月, 2018 1 次提交
-
-
由 Anson Huang 提交于
i.MX6 SoCs has MMDC clock gates in CCM CCGR, add clock property for MMDC driver's clock operation. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 26 9月, 2018 1 次提交
-
-
由 Rob Herring 提交于
dtc has new checks for SPI buses. Fix the warnings in node names and unit-addresses. There's over 100 warnings for FSL boards, a few examples: arch/arm/boot/dts/imx28-duckbill-2-spi.dtb: Warning (spi_bus_bridge): /apb@80000000/apbh@80000000/ssp@80014000: node name for SPI buses should be 'spi' arch/arm/boot/dts/imx53-ppd.dtb: Warning (spi_bus_bridge): /soc/aips@50000000/spba@50000000/ecspi@50010000: node name for SPI buses should be 'spi' arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtb: Warning (spi_bus_reg): /soc/aips-bus@2000000/spba-bus@2000000/spi@2014000/mcp251x@1: SPI bus unit address format error, expected "0" Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Li Yang <leoyang.li@nxp.com> Cc: Stefan Agner <stefan@agner.ch> Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Acked-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 11 7月, 2018 1 次提交
-
-
由 Fabio Estevam 提交于
Since commit 654f2b93 ("crypto: caam - allow retrieving 'era' from register") the CAAM driver is capable of obtaining the era version by reading the appropriate CAAM registers, so let the CAAM driver discover the era version in run-time instead of hardcoding such information in the device tree. According to Documentation/devicetree/bindings/crypto/fsl-sec4.txt the 'fsl,sec-era' is an optional property and this can be safely removed now. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-