- 20 7月, 2018 1 次提交
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由 liwei 提交于
Signed-off-by: NLi Wei <liwei213@huawei.com> Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: NGuodong Xu <guodong.xu@linaro.org> Tested-by: NJohn Stultz <john.stultz@linaro.org> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 26 5月, 2018 1 次提交
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由 Bjorn Andersson 提交于
The msm8996 PCIe sits behind the "agnoc0", which is represented as a simple-pm-bus, so enable support for this. Then enable the QMP phy driver. Also enable the atl1c ethernet driver and ath10k wlan driver to support these components on the DragonBoard820c. Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 25 5月, 2018 3 次提交
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由 John Garry 提交于
Now that the driver has been merged for the HiSilicon LPC host, enable the relevant config. Turning on this config will also enable config INDIRECT_PIO, which would have not been enabled previously - see config info for more details. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Shawn Guo 提交于
It enables driver support of Ethernet, eMMC, Combo/INNO phy and PCIe for Hi3798CV200 Poplar platform. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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由 Bjorn Andersson 提交于
Enable GLINK RPM so that we get RPM regulators and clocks and enable the UFS host controller driver and the Qualcomm UFS platform driver. The UFS phy is selected by the Qualcomm UFS driver. The simple ondemand devfreq governor must be builtin, as there's no mechanism for automatically loading it, causing UFS HCD initialization to fail. Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 17 5月, 2018 1 次提交
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由 Antoine Tenart 提交于
This patch enables the Armada thermal driver to support thermal management on Marvell EBU Armada SoCs (7K,8K). Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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- 16 5月, 2018 1 次提交
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由 Simon Horman 提交于
Enable the Renesas R-Car E3 (R8A77990) SoC in the ARM64 defconfig. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 14 5月, 2018 1 次提交
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由 Stefan Wahren 提交于
The VC4 needs more memory than the default setting (16 MB): vc4-drm soc:gpu: swiotlb: coherent allocation failed, size=16777216 [drm:vc4_bo_create [vc4]] *ERROR* Failed to allocate from CMA: vc4_v3d 3fc00000.v3d: Failed to allocate memory for tile binning: -12. You may need to enable CMA or give it more memory. vc4-drm soc:gpu: failed to bind 3fc00000.v3d (ops vc4_v3d_ops [vc4]): -12 vc4-drm soc:gpu: master bind failed: -12 vc4-drm: probe of soc:gpu failed with error -12 So increase the value to 32 MB and fix this issue. Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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- 11 5月, 2018 1 次提交
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由 Shawn Lin 提交于
Now Rockchip PCIe drivers could support both of RC mode and EP mode, so we need to rename the config name. This patch updates defconfig to reflect the fact that we want to build Rockchip PCIe controller as RC mode, into a module as before. Cc: linux-arm-kernel@lists.infradead.org Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- 09 5月, 2018 1 次提交
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由 Heiko Stuebner 提交于
The efuses on Rockchip socs often contain informations about specifics of the chip its running on (leakage currents etc) which components might want to read to adjust settings accordingly. So enable the efuse early for that. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 02 5月, 2018 2 次提交
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由 Kuninori Morimoto 提交于
CONFIG_SND_AUDIO_GRAPH_CARD is needed to use HDMI sound with video Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 27 4月, 2018 2 次提交
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由 Gregory CLEMENT 提交于
The SPI is used on many boards (especially for the serial flashes). Enable it by default. Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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由 Sean Wang 提交于
Recently kernelCI reported the board mt7622-rfb1 has a fail test with kernel: ERROR: did not start booting whose details could be seen at [1]. The cause is that UART0 can't output anything when it's missing a proper pin setup with current DTS, so the essential driver is always getting enabled to fix up the issue. [1] https://kernelci.org/boot/id/5ad7d62759b51461bfb1f829/ Cc: Kevin Hilman <khilman@baylibre.com> Cc: stable@vger.kernel.org Fixes: ae457b76 ("arm64: dts: mt7622: add SoC and peripheral related device nodes") Signed-off-by: NSean Wang <sean.wang@mediatek.com> Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>
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- 26 4月, 2018 7 次提交
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由 Ezequiel Garcia 提交于
Enable the Bluetooth USB controller which is present in the RK3399 Kevin Chromebook. Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Ezequiel Garcia 提交于
Enable the wireless network driver to support the WiFi adapter present in RK3399 Kevin Chromebooks. Note that this also enables Bluetooth via USB. Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Ezequiel Garcia 提交于
Enable the Atmel Maxtouch driver to support the touchscreen and touchpad present in RK3399 Kevin Chromebooks. Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Ezequiel Garcia 提交于
Enable the HID-I2C driver to support the stylus present in RK3399 Kevin Chromebooks. Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Enric Balletbo i Serra 提交于
Enable following drivers for merged devices: - ChromeOS EC RTC driver. - ChromeOS EC userspace interface. - ChromeOS EC light and proximity sensors. - ChromeOS EC Barometer Sensor driver. Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Enric Balletbo i Serra 提交于
Heiko Stübner justified pretty well the change in commit e330eb86 ("ARM: multi_v7_defconfig: enable Rockchip io-domain driver"). This change is also needed for arm64 rockchip boards, so, do the same for arm64. The io-domain driver is necessary to notify the soc about voltages changes happening on supplying regulators. Probably the most important user right now is the mmc tuning code, where the soc needs to get notified when the voltage is dropped to the 1.8V point. As this option is necessary to successfully tune UHS cards etc, it should get built in. Otherwise, tuning will fail with, dwmmc_rockchip fe320000.dwmmc: All phases bad! mmc0: tuning execution failed: -5 Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Enric Balletbo i Serra 提交于
Enables typec phyter and extcon driver for cable detection that is used by USB 3.0 controller for Rockchip rk3399 SoCs. Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: NAlexandre Courbot <acourbot@chromium.org> Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 24 4月, 2018 1 次提交
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由 Stefan Wahren 提交于
The Raspberry Pi 3 B+ has a Microchip LAN7515 (connect via USB) and a Cypress CYW43455 (connect via UART). This patch enables the necessary drivers. Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 27 3月, 2018 1 次提交
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由 Kunihiko Hayashi 提交于
Enable the thermal monitor driver and the AVE ethernet driver implemented on UniPhier SoCs. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 23 3月, 2018 1 次提交
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由 Dinh Nguyen 提交于
This patch enables the CONFIG_STMMAC_ETH to the default arm64 defconfig: -CONFIG_STMMAC_ETH=m +CONFIG_STMMAC_ETH=y +CONFIG_DWMAC_IPQ806X=m +CONFIG_DWMAC_MESON=m +CONFIG_DWMAC_ROCKCHIP=m +CONFIG_DWMAC_SUNXI=m +CONFIG_DWMAC_SUN8I=m The STMMAC ethernet controller is on the Stratix10 platform, and thus needs driver to be in the kernel image for NFS to work. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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- 14 3月, 2018 1 次提交
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由 Thierry Reding 提交于
Display and graphics can't work together without an SMMU, so it is effectively always getting enabled anyway. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 09 3月, 2018 6 次提交
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由 Mikko Perttunen 提交于
Enable Tegra BPMP thermal sensor support by default, built as a module. Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Mikko Perttunen 提交于
Enable Tegra186 CPU frequency scaling support by default. Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Amit Kucheria 提交于
Enable the various CPUFREQ governors and statistics to ease development. Don't change the default governor - performance governor. Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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由 Amit Kucheria 提交于
Enable the driver for the TSENS IP that is present across several QCOM SoCs. Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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由 Amit Kucheria 提交于
The APCS block is present on several Qualcomm SoCs e.g. 8916, 8996. On the 8916 it is needed to enable the clock controller that in turn enables cpufreq on the platform while on the 8996 it is needed for communication with RPM. Signed-off-by: NAmit Kucheria <amit.kucheria@linaro.org> Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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由 Mikko Perttunen 提交于
Enable NVIDIA Tegra194 support in the default 64-bit ARM configuration. Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 07 3月, 2018 2 次提交
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由 Ard Biesheuvel 提交于
Enable support in arm64's defconfig for Socionext SynQuacer based platforms, by enabling the arch Kconfig symbol, and enabling builtin support for the ethernet, GPIO and SDHCI controllers Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Ard Biesheuvel 提交于
New crypto drivers have been introduced in v4.16 that implement the SHA-512, SHA3 and SM3 secure hash algorithms using ARMv8.2 optional instructions. Add these drivers to arm64's defconfig as modules. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 02 3月, 2018 1 次提交
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由 John Garry 提交于
For certain workloads the deadline IO scheduler offers particular advantages over other schedulers and has shown to perform better, so enable it. The default IO scheduler is unaffected by this change, and currently is CFQ. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
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- 26 2月, 2018 1 次提交
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由 Simon Horman 提交于
Enable the Renesas R-Car M3-N (R8A77965) SoC in the ARM64 defconfig. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 22 2月, 2018 1 次提交
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由 Yoshihiro Shimoda 提交于
Enables PWM controller, USB-DMAC that is used by HS-USB, USB 3.0 peripheral controller and USB 3.0 PHY for R-Car SoCs. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 2月, 2018 1 次提交
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由 Jerome Brunet 提交于
Enable nvmem meson efuse driver as a module Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 12 2月, 2018 1 次提交
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由 Simon Horman 提交于
Enable the Renesas R-Car V3H (R8A77980) SoC in the ARM64 defconfig. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 19 1月, 2018 2 次提交
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由 shiju.jose@huawei.com 提交于
Enable APEI EINJ for ARM64 to support the error injection. Signed-off-by: NShiju Jose <shiju.jose@huawei.com> Acked-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 shiju.jose@huawei.com 提交于
Enable CONFIG_EDAC_GHES option for ARM64,so that the memory errors are processed and reported to the user space. Signed-off-by: NShiju Jose <shiju.jose@huawei.com> Acked-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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