- 20 11月, 2014 2 次提交
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由 Tomi Valkeinen 提交于
Instead of using a hacky "dss_fck" clock (which toggles the MODULEMODE bit) as DSS L3 interface clock, set the .modulemode field in the omap44xx_dss_hwmod. This works now that the DSS core hwmod is enabled during DSS submodule resets. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: NArchit Taneja <archit.taneja@gmail.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tomi Valkeinen 提交于
Set DSS core hwmod as the parent for all the DSS submodules. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: NArchit Taneja <archit.taneja@gmail.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 29 7月, 2014 1 次提交
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由 Laurent Pinchart 提交于
The fields are not used by the driver and will be removed from platform data. Don't set them. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 15 7月, 2014 1 次提交
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由 Suman Anna 提交于
The legacy-style definition of the hwmod addr space is no longer required after the addition of the OMAP4 mailbox DT node, so clean up this data. Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <bcousson@baylibre.com> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 5月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
All audio related omap_hwmod_ocp_if *_dma can be removed from the data since we can just add the user flag to the non dma structure. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 14 3月, 2014 1 次提交
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由 Suman Anna 提交于
The spinlock module's SYSCONFIG register does not support smart wakeup, so remove this flag from the idle modes in the spinlock hwmod definition. Signed-off-by: NSuman Anna <s-anna@ti.com> Acked-by: NBenoit Cousson <bcousson@baylibre.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 12月, 2013 1 次提交
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由 Roger Quadros 提交于
Without this, the USB devices are sometimes not detected on OMAP4 Panda with u-boot v2013.10. Unlike what the comment states, errata i660 does not state that we can't RESET the USB host module. Instead it states that RESET is the only way to recover from a deadlock situation. RESET ensures that the module is in a known good state irrespective of what bootloader does with the module, so it must be done at boot. Reported-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> # Panda, BeagleXM Acked-by: NBenoît Cousson <bcousson@baylibre.com> Fixes: af88fa9a ("ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP4") Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 10月, 2013 1 次提交
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由 Rajendra Nayak 提交于
For modules/IPs/hwmods which do not have -1- sys->class->reset() and -2- hardreset lines and -3- No way to do an ocp reset (no sysc control) the flag 'HWMOD_INIT_NO_RESET' is not much useful. Cleanup all such instances across various hwmod data files. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 30 7月, 2013 1 次提交
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由 Rajendra Nayak 提交于
With commit '82702ea1' "ARM: OMAP2+: Fix serial init for device tree based booting" stubbing out omap_serial_early_init() for Device tree based booting, there was a crash observed on AM335x based devices when hwmod does a _setup_reset() early at boot. This was rootcaused to hwmod trying to reset console uart while earlycon was using it. The way to tell hwmod not to do this is to specify the HWMOD_INIT_NO_RESET flag, which were infact set by the omap_serial_early_init() function by parsing the cmdline to identify the console device. Parsing the cmdline to identify the uart used by earlycon itself seems broken as there is nothing preventing earlycon to use a different one. This patch, instead, attempts to populate the requiste flags for hwmod based on the CONFIG_DEBUG_OMAPxUARTy FLAGS. This gets rid of the need for cmdline parsing in the DT as well as non-DT cases to identify the uart used by earlycon. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Reported-by: NMark Jackson <mpfj-list@newflow.co.uk> Reported-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NMark Jackson <mpfj-list@newflow.co.uk> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 13 6月, 2013 1 次提交
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由 Sricharan R 提交于
Commit '3b9b1015' cleaned up the data file to remove all irq and dma entries for all hwmods, which are now populated by DT. But mcspi and mmc irq, dma entries were retained since MMC, NFS boot was not working. Since it is root caused to be an issue with only DMA entries [1], irq can be safely removed. [1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg90115.htmlSigned-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 6月, 2013 1 次提交
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由 Tomi Valkeinen 提交于
Commit 3b9b1015 (ARM: OMAP4: hwmod data: Clean up the data file) removes hwmod data for omap4, including DSS data. DSS has not yet been converted to DT, so the hwmod data is still needed. This patch adds back the DSS parts of the hwmod data. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 6月, 2013 1 次提交
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由 Sricharan R 提交于
- The IO resource information like dma request lines, irq number and ocp address space can be populated via dt blob. So such data is stripped from OMAP4 SOC hwmod data file. - The devices which are still missing the device tree bindings, address space entries are not removed yet. When such devices add the dt bindings, respective address space data can be deleted. - Also other unnecessary hwmods like firewalls are removed as a part of this. Since emif was getting registered only because of this firewalls links, the mpu->emif direct link is added now. The above update, results in reduction of about ~1650 lines of code. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NSricharan R <r.sricharan@ti.com> Acked-by: NBenoit Cousson <benoit.cousson@linaro.org> Acked-by: NPaul Walmsley <paul@pwsan.com> [tony@atomide.com: updated for omap44xx_usb_phy_and_pll_addrs, dropped mcspi and mmc changes to avoid regressions on omap4sdp] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 5月, 2013 1 次提交
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由 Tony Lindgren 提交于
This is omap4+ only and no longer needed as omap4+ can be booted using device tree. Also remove the related pdata handling from the driver and the now unneeded platform_data/omap_ocp2scp.h. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Reviewed-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 5月, 2013 1 次提交
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由 Santosh Shilimkar 提交于
OMAP UART IP needs software control for slave idle modes based on functional state of the IP. i.e The IP slave idle settings should be set to 'noidle' when being used and then put back to 'smart_idle' when unused. Currently this is handled by the driver with function pointers implemented in platform code. This however breaks in case of device tree because of missing idle handling APIs. Previous patches in this series added a flag HWMOD_SWSUP_SIDLE_ACTIVE which takes care of the mentioned requirement. Hence add the flag for all UART IPs to take advantage of feature supported by framework. Subsequent patches removes the slave idle handling from driver code. Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 11 4月, 2013 1 次提交
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由 Kishon Vijay Abraham I 提交于
Commit 92702df3 ("ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup") makes the 'ocp2scp_usb_phy_phy_48m' as optional functional clock causing regression in MUSB. But this 48MHz clock is a mandatory clock for usb phy attached to ocp2scp and hence made as the main clock for ocp2scp. Cc: Keerthy <j-keerthy@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> [paul@pwsan.com: add comment to the hwmod data to try to prevent any future mistakes here] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 3月, 2013 1 次提交
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由 Paul Walmsley 提交于
Commit 17b7e7d3 ("ARM: OMAP4: clock/hwmod data: start to remove some IP block control "clocks"") introduced a regression preventing the L3INIT clockdomain of OMAP4 systems from entering idle. This in turn prevented these systems from entering full chip clock-stop. The regression was caused by the incorrect removal of a so-called "optional functional clock" from the OMAP4 clock data. This wasn't caught for two reasons. First, I missed the retention entry failure in the branch test logs: http://www.pwsan.com/omap/testlogs/cleanup_a_3.9/20130126014242/pm/4460pandaes/4460pandaes_log.txt Second, the integration data for the OCP2SCP PHY IP block, added by commit 0c668875 ("ARM: OMAP4: hwmod data: add remaining USB-related IP blocks"), should have associated this clock with the IP block, but did not. Fix by adding back the so-called "optional" functional clock to the clock data, and by linking that clock to the OCP2SCP PHY IP block integration hwmod data. The problem patch was discovered by J, Keerthy <j-keerthy@ti.com>. Cc: Keerthy <j-keerthy@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 11 2月, 2013 3 次提交
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由 Sebastien Guiriec 提交于
Enable AESS data in hwmod in order to be able to probe audio driver. Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Sebastien Guiriec 提交于
Add AESS memory bank data in hwmod in order to provide memory address information to the driver. This version also changes the AESS main clock to use a non-CLKCTRL-based functional clock. These are being removed from the clock data, since they should be handled by the IP block integration code. Without this change, the kernel crashes during boot. Thanks to Tony Lindgren for reporting this during a test merge. Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> [paul@pwsan.com: updated to change the AESS main_clk] Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Enable the AESS auto-gating control bit during AESS hwmod setup. This fixes the following boot warning on OMAP4: omap_hwmod: aess: _wait_target_disable failed Without this patch, the AESS IP block does not indicate to the PRCM that it is idle after it is reset. This prevents some types of SoC power management until something sets the auto-gating control bit. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Péter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tony Lindgren <tony@atomide.com>
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- 07 2月, 2013 1 次提交
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由 Kishon Vijay Abraham I 提交于
Now that we have a separate driver for the control module, stop populating the control module device data in other modules (PHY and OTG) device info. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 1月, 2013 2 次提交
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由 Paul Walmsley 提交于
Convert all DEFINE_OMAP_MUX_GATE() combinations that list MODULEMODE registers in their gate arguments to DEFINE_OMAP_MUX(), dropping the MODULEMODE data. This is possible because the MODULEMODE bits control IP blocks, not clocks; and the hwmod code takes care of IP block control. Rename these clocks to reflect the original multiplexer name as specified in the comments. And convert the hwmod data to use the multiplexer clock name. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Mike Turquette <mturquette@linaro.org>
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由 Paul Walmsley 提交于
Remove some leaf "clocks" that are actually IP block idle control points, since these should now be handled by the hwmod code. There are still a few types of MODULEMODE clocks that need to be cleaned up: - those still in use by driver or integration code - those in DEFINE_CLK_OMAP_MUX_GATE() blocks; the gate portion of these should be removed A similar process may also be possible on OMAP2/3. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Mike Turquette <mturquette@linaro.org>
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- 19 1月, 2013 1 次提交
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由 Peter Ujfalusi 提交于
McPDM need to be configured to NO_IDLE mode when it is in used otherwise vital clocks will be gated which results 'slow motion' audio playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: copy patch description into hwmod data comments] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 18 12月, 2012 1 次提交
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由 Wei Yongjun 提交于
Remove duplicated include. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 12月, 2012 1 次提交
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由 Omar Ramirez Luna 提交于
This prevents hwmod _enable_clocks...omap2_dflt_clk_enable path from enabling modulemode inside CLKCTRL using its clk->enable_reg field. Instead is left to _omap4_enable_module though soc_ops, as the one in charge of this setting. According to comments received[1] for related patches the idea is to get rid of leaf clocks in future. So remove these two while at it. [1] http://lkml.org/lkml/2012/8/20/226Signed-off-by: NOmar Ramirez Luna <omar.luna@linaro.org> Tested-by: NOhad Ben-Cohen <ohad@wizery.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 01 12月, 2012 1 次提交
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由 Tony Lindgren 提交于
Based on earlier discussions[1] we attempted to find a suitable location for the omap DMA header in commit 2b6c4e73 (ARM: OMAP: DMA: Move plat/dma.h to plat-omap/dma-omap.h) until the conversion to dmaengine is complete. Unfortunately that was before I was able to try to test compile of the ARM multiplatform builds for omap2+, and the end result was not very good. So I'm creating yet another all over the place patch to cut the last dependency for building omap2+ for ARM multiplatform. After this, we have finally removed the driver dependencies to the arch/arm code, except for few drivers that are being worked on. The other option was to make the <plat-omap/dma-omap.h> path to work, but we'd have to add some new header directory to for multiplatform builds. Or we would have to manually include arch/arm/plat-omap/include again from arch/arm/Makefile for omap2+. Neither of these alternatives sound appealing as they will likely lead addition of various other headers exposed to the drivers, which we want to avoid for the multiplatform kernels. Since we already have a minimal include/linux/omap-dma.h, let's just use that instead and add a note to it to not use the custom omap DMA functions any longer where possible. Note that converting omap DMA to dmaengine depends on dmaengine supporting automatically incrementing the FIFO address at the device end, and converting all the remaining legacy drivers. So it's going to be few more merge windows. [1] https://patchwork.kernel.org/patch/1519591/# cc: Russell King <linux@arm.linux.org.uk> cc: Kevin Hilman <khilman@ti.com> cc: "Benoît Cousson" <b-cousson@ti.com> cc: Herbert Xu <herbert@gondor.apana.org.au> cc: "David S. Miller" <davem@davemloft.net> cc: Vinod Koul <vinod.koul@intel.com> cc: Dan Williams <djbw@fb.com> cc: Mauro Carvalho Chehab <mchehab@infradead.org> cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> cc: David Woodhouse <dwmw2@infradead.org> cc: Kyungmin Park <kyungmin.park@samsung.com> cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> cc: Tomi Valkeinen <tomi.valkeinen@ti.com> cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> cc: Hans Verkuil <hans.verkuil@cisco.com> cc: Vaibhav Hiremath <hvaibhav@ti.com> cc: Lokesh Vutla <lokeshvutla@ti.com> cc: Rusty Russell <rusty@rustcorp.com.au> cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> cc: Afzal Mohammed <afzal@ti.com> cc: linux-crypto@vger.kernel.org cc: linux-media@vger.kernel.org cc: linux-mtd@lists.infradead.org cc: linux-usb@vger.kernel.org cc: linux-fbdev@vger.kernel.org Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 11月, 2012 1 次提交
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由 Shubhrajyoti D 提交于
The OMAP_I2C_FLAG_RESET_REGS_POSTIDLE is not used anymore in the i2c driver. Remove the flag. Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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- 21 11月, 2012 1 次提交
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由 Tony Lindgren 提交于
Move iommu/iovmm headers from plat/ to platform_data/ as part of the single zImage work. Partially based on an earlier version by Ido Yariv <ido@wizery.com>. Cc: Ido Yariv <ido@wizery.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Omar Ramirez Luna <omar.luna@linaro.org> Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Acked-by: NOhad Ben-Cohen <ohad@wizery.com> Acked-by: NJoerg Roedel <joro@8bytes.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 11月, 2012 1 次提交
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由 Jon Hunter 提交于
Currently OMAP2+ devices are using the function __omap_dm_timer_reset() to configure the clock-activity, idle, wakeup-enable and auto-idle fields in the timer OCP_CFG register. The name of the function is mis-leading because this function does not actually perform a reset of the timer. For OMAP2+ devices, HWMOD is responsible for reseting and configuring the timer OCP_CFG register. Therefore, do not use __omap_dm_timer_reset() for OMAP2+ devices and rely on HWMOD. Furthermore, some timer instances do not have the fields clock-activity, wakeup-enable and auto-idle and so this function could configure the OCP_CFG register incorrectly. Currently HWMOD is not configuring the clock-activity field in the OCP_CFG register for timers that have this field. Commit 0f0d0807 (ARM: OMAP: DMTimer: Use posted mode) configures the clock-activity field to keep the f-clk enabled so that the wake-up capability is enabled. Therefore, add the appropriate flags to the timer HWMOD structures to configure this field in the same way. For OMAP2/3 devices all dmtimers have the clock-activity field, where as for OMAP4 devices, only dmtimer 1, 2 and 10 have the clock-activity field. Verified on OMAP2420 H4, OMAP3430 Beagle and OMAP4430 Panda that HWMOD is configuring the dmtimer OCP_CFG register as expected for clock-events timer. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 08 11月, 2012 1 次提交
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由 Kishon Vijay Abraham I 提交于
In order to reflect devices(usb_phy) attached to ocp2scp bus, ocp2scp is assigned a device attribute to represent the attached devices. This is needed to fix MUSB regression caused by commit c9e4412a (arm: omap: phy: remove unused functions from omap-phy-internal.c) Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> [tony@atomide.com: updated comments for regression info] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 11月, 2012 1 次提交
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由 Tony Lindgren 提交于
Most of the prototypes in plat-omap/common.h are not common to omap1 and omap2+, they are local to omap2+ and should not be in plat-omap/common.h. The only shared function prototype in this file is omap_init_clocksource_32k(), let's put that into counter-32k.h. Note that the new plat/counter-32k.h must not be included from drivers, that will break omap2+ build for CONFIG_MULTIPLATFORM. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 10月, 2012 1 次提交
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由 Paul Walmsley 提交于
Resolve this kernel boot message: omap_hwmod: mcpdm: cannot be enabled for reset (3) The McPDM on OMAP4 can only receive its functional clock from an off-chip source. This source is not guaranteed to be present on the board, and when present, it is controlled by I2C. This would introduce a board dependency to the early hwmod code which it was not designed to handle. Also, neither the driver for this off-chip clock provider nor the I2C code is available early in boot when the hwmod code is attempting to enable and reset IP blocks. This effectively makes it impossible to enable and reset this device during hwmod init. At its core, this patch is a workaround for an OMAP hardware problem. It should be possible to configure the OMAP to provide any IP block's functional clock from an on-chip source. (This is true for almost every IP block on the chip. As far as I know, McPDM is the only exception.) If the kernel cannot reset and configure IP blocks, it cannot guarantee a sane SoC state. Relying on an optional off-chip clock also creates a board dependency which is beyond the scope of the early hwmod code. This patch works around the issue by marking the McPDM hwmod record with the HWMOD_EXT_OPT_MAIN_CLK flag. This prevents the hwmod code from touching the device early during boot. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Péter Ujfalusi <peter.ujfalusi@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
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- 19 10月, 2012 1 次提交
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由 Tony Lindgren 提交于
Let's make omap_hwmod local to mach-omap2 for ARM common zImage support. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 10月, 2012 2 次提交
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由 Tony Lindgren 提交于
We cannot keep this in plat/common.h for common zImage support. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
There's no need to keep the device related things in the common i2c.c as omap2+ is using hwmod. Split the code to mach-omap1 and mach-omap2 parts and only leave common code to plat-omap/i2c.c. Note that as omap1 only has one i2c controller, we can now remove the old device related macros. Reviewed-by: NShubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 10月, 2012 2 次提交
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由 Lokesh Vutla 提交于
Move plat/dma.h to plat-omap/dma-omap.h as part of single zImage work Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
We need to remove this from plat for ARM common zImage support. Also remove includes not needed by the omap_hsmmc.c driver. Cc: linux-mmc@vger.kernel.org Acked-by: NChris Ball <cjb@laptop.org> Acked-by: NVenkatraman S <svenkatr@ti.com> [tony@atomide.com: fold in removal of unused driver includes] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 9月, 2012 3 次提交
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由 Jon Hunter 提交于
OMAP4460 and OMAP4470 devices have dedicated PMU interrupts and so add these interrupts to the MPU HWMOD so we can use these for PMU events on these devices. The PMU interrupts need to be the first interrupts in the array of interrupts as the ARM PMU driver assumes this. By using these dedicated interrupts we only need to enable the MPU and DEBUG sub-systems for PMU to work. This is different to OMAP4430 that did not have dedicated interrupts and required other power domains in addition to the DEBUG sub-system to be enabled so we could route the PMU events to the CTI interrupts. Hence, OMAP4460 and OMAP4470 devices can use the same list of HWMODs to create the PMU device that is using by OMAP3. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
Some instances of the DMTIMER peripheral on OMAP devices have the ability to interrupt the on-chip DSP in addition to the ARM CPU. Add a DMTIMER attribute to indicate which timers can interrupt the DSP. By using the omap_dm_timer_request_by_cap() API, driver will now be able to allocate a DMTIMER that can interrupt the DSP based upon this attribute and not require the driver to know which instance has this capability. DMTIMERs that have the ability to interrupt the DSP on OMAP devices are as follows ... - OMAP1 (OMAP5912/16xx/17xx) devices - All 8 DMTIMERs - OMAP2/3/4 devices - DMTIMERs 5-8 Please note that for OMAP3+, timer8 has the ability to interrupt the DSP and generate a PWM output. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Afzal Mohammed 提交于
Add gpmc hwmod and associated interconnect data Signed-off-by: NAfzal Mohammed <afzal@ti.com> [paul@pwsan.com: added comments to the use of HWMOD_INIT_NO_RESET] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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