1. 17 12月, 2018 1 次提交
  2. 11 12月, 2018 1 次提交
  3. 05 12月, 2018 9 次提交
  4. 30 11月, 2018 1 次提交
    • J
      nvme: implement mq_ops->commit_rqs() hook · 04f3eafd
      Jens Axboe 提交于
      Split the command submission and the SQ doorbell ring, and add the
      doorbell ring as our ->commit_rqs() hook. This allows a list of
      requests to be issued, with nvme only writing the SQ update when
      it's necessary. This is more efficient if we have lists of requests
      to issue, particularly on virtualized hardware, where writing the
      SQ doorbell is more expensive than on real hardware. For those cases,
      performance increases of 2-3x have been observed.
      
      The use case for this is plugged IO, where blk-mq flushes a batch of
      requests at the time.
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NJens Axboe <axboe@kernel.dk>
      04f3eafd
  5. 26 11月, 2018 2 次提交
  6. 19 11月, 2018 1 次提交
    • J
      nvme: default to 0 poll queues · a4668d9b
      Jens Axboe 提交于
      We need a better way of configuring this, and given that polling is
      (still) a bit niche, let's default to using 0 poll queues. That way
      we'll have the same read/write/poll behavior as 4.20, and users that
      want to test/use polling are required to do manual configuration of the
      number of poll queues.
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NJens Axboe <axboe@kernel.dk>
      a4668d9b
  7. 16 11月, 2018 2 次提交
  8. 15 11月, 2018 1 次提交
  9. 08 11月, 2018 3 次提交
  10. 02 11月, 2018 1 次提交
    • K
      nvme-pci: fix conflicting p2p resource adds · 9fe5c59f
      Keith Busch 提交于
      The nvme pci driver had been adding its CMB resource to the P2P DMA
      subsystem everytime on on a controller reset. This results in the
      following warning:
      
          ------------[ cut here ]------------
          nvme 0000:00:03.0: Conflicting mapping in same section
          WARNING: CPU: 7 PID: 81 at kernel/memremap.c:155 devm_memremap_pages+0xa6/0x380
          ...
          Call Trace:
           pci_p2pdma_add_resource+0x153/0x370
           nvme_reset_work+0x28c/0x17b1 [nvme]
           ? add_timer+0x107/0x1e0
           ? dequeue_entity+0x81/0x660
           ? dequeue_entity+0x3b0/0x660
           ? pick_next_task_fair+0xaf/0x610
           ? __switch_to+0xbc/0x410
           process_one_work+0x1cf/0x350
           worker_thread+0x215/0x3d0
           ? process_one_work+0x350/0x350
           kthread+0x107/0x120
           ? kthread_park+0x80/0x80
           ret_from_fork+0x1f/0x30
          ---[ end trace f7ea76ac6ee72727 ]---
          nvme nvme0: failed to register the CMB
      
      This patch fixes this by registering the CMB with P2P only once.
      Signed-off-by: NKeith Busch <keith.busch@intel.com>
      Reviewed-by: NLogan Gunthorpe <logang@deltatee.com>
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NJens Axboe <axboe@kernel.dk>
      9fe5c59f
  11. 18 10月, 2018 3 次提交
  12. 17 10月, 2018 2 次提交
  13. 03 10月, 2018 1 次提交
  14. 28 8月, 2018 1 次提交
    • M
      nvme-pci: add a memory barrier to nvme_dbbuf_update_and_check_event · f1ed3df2
      Michal Wnukowski 提交于
      In many architectures loads may be reordered with older stores to
      different locations.  In the nvme driver the following two operations
      could be reordered:
      
       - Write shadow doorbell (dbbuf_db) into memory.
       - Read EventIdx (dbbuf_ei) from memory.
      
      This can result in a potential race condition between driver and VM host
      processing requests (if given virtual NVMe controller has a support for
      shadow doorbell).  If that occurs, then the NVMe controller may decide to
      wait for MMIO doorbell from guest operating system, and guest driver may
      decide not to issue MMIO doorbell on any of subsequent commands.
      
      This issue is purely timing-dependent one, so there is no easy way to
      reproduce it. Currently the easiest known approach is to run "Oracle IO
      Numbers" (orion) that is shipped with Oracle DB:
      
      orion -run advanced -num_large 0 -size_small 8 -type rand -simulate \
      	concat -write 40 -duration 120 -matrix row -testname nvme_test
      
      Where nvme_test is a .lun file that contains a list of NVMe block
      devices to run test against. Limiting number of vCPUs assigned to given
      VM instance seems to increase chances for this bug to occur. On test
      environment with VM that got 4 NVMe drives and 1 vCPU assigned the
      virtual NVMe controller hang could be observed within 10-20 minutes.
      That correspond to about 400-500k IO operations processed (or about
      100GB of IO read/writes).
      
      Orion tool was used as a validation and set to run in a loop for 36
      hours (equivalent of pushing 550M IO operations). No issues were
      observed. That suggest that the patch fixes the issue.
      
      Fixes: f9f38e33 ("nvme: improve performance for virtual NVMe devices")
      Signed-off-by: NMichal Wnukowski <wnukowski@google.com>
      Reviewed-by: NKeith Busch <keith.busch@intel.com>
      Reviewed-by: NSagi Grimberg <sagi@grimberg.me>
      [hch: updated changelog and comment a bit]
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      f1ed3df2
  15. 30 7月, 2018 1 次提交
  16. 23 7月, 2018 1 次提交
  17. 12 7月, 2018 1 次提交
    • K
      nvme-pci: fix memory leak on probe failure · b6e44b4c
      Keith Busch 提交于
      The nvme driver specific structures need to be initialized prior to
      enabling the generic controller so we can unwind on failure with out
      using the reference counting callbacks so that 'probe' and 'remove'
      can be symmetric.
      
      The newly added iod_mempool is the only resource that was being
      allocated out of order, and a failure there would leak the generic
      controller memory. This patch just moves that allocation above the
      controller initialization.
      
      Fixes: 943e942e ("nvme-pci: limit max IO size and segments to avoid high order allocations")
      Reported-by: NWeiping Zhang <zwp10758@gmail.com>
      Signed-off-by: NKeith Busch <keith.busch@intel.com>
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      b6e44b4c
  18. 22 6月, 2018 1 次提交
    • J
      nvme-pci: limit max IO size and segments to avoid high order allocations · 943e942e
      Jens Axboe 提交于
      nvme requires an sg table allocation for each request. If the request
      is large, then the allocation can become quite large. For instance,
      with our default software settings of 1280KB IO size, we'll need
      10248 bytes of sg table. That turns into a 2nd order allocation,
      which we can't always guarantee. If we fail the allocation, blk-mq
      will retry it later. But there's no guarantee that we'll EVER be
      able to allocate that much contigious memory.
      
      Limit the IO size such that we never need more than a single page
      of memory. That's a lot faster and more reliable. Then back that
      allocation with a mempool, so that we know we'll always be able
      to succeed the allocation at some point.
      Signed-off-by: NJens Axboe <axboe@kernel.dk>
      Acked-by: NKeith Busch <keith.busch@intel.com>
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      943e942e
  19. 21 6月, 2018 1 次提交
  20. 09 6月, 2018 6 次提交