1. 13 9月, 2012 2 次提交
    • T
      ARM: OMAP2+: Prepare for irqs.h removal · 7d7e1eba
      Tony Lindgren 提交于
      As the interrupts should only be defined in the platform_data, and
      eventually coming from device tree, there's no need to define them
      in header files.
      
      Let's remove the hardcoded references to irqs.h and fix up the includes
      so we don't rely on headers included in irqs.h. Note that we're
      defining OMAP_INTC_START as 0 to the interrupts. This will be needed
      when we enable SPARSE_IRQ. For some drivers we need to add
      #include <plat/cpu.h> for now until these drivers are fixed to
      remove cpu_is_omapxxxx() usage.
      
      While at it, sort som of the includes the standard way, and add
      the trailing commas where they are missing in the related data
      structures.
      
      Note that for drivers/staging/tidspbridge we just define things
      locally.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7d7e1eba
    • T
      ARM: OMAP: Move gpio.h to include/linux/platform_data · 4b25408f
      Tony Lindgren 提交于
      This way we can remove includes of plat/gpio.h which won't work
      with the single zImage support.
      
      Note that we also remove the cpu_class_is_omap2() check
      in gpio-omap.c as the drivers should not call it as we need to
      make it local to arch/arm/mach-omap2 for single zImage support.
      
      While at it, arrange the related includes in the standard way.
      
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: linux-mtd@lists.infradead.org
      Cc: alsa-devel@alsa-project.org
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      4b25408f
  2. 14 6月, 2012 2 次提交
    • J
      ARM: OMAP2+: Fix external clock support for dmtimers · 67d2e760
      Jon Hunter 提交于
      Currently, the dmtimer determines whether an timer can support an external
      clock source (sys_altclk) for driving the timer by the IP version. Only
      OMAP24xx devices can support an external clock source, but the IP version
      between OMAP24xx and OMAP3xxx is common and so this incorrectly indicates
      that OMAP3 devices can use an external clock source.
      
      Rather than use the IP version, just let the clock framework handle this.
      If the "alt_ck" does not exist for a timer then the clock framework will fail
      to find the clock and hence will return an error. By doing this we can eliminate
      the "timer_ip_version" variable passed as part of the platform data and simplify
      the code.
      
      We can also remove the timer IP version from the HWMOD data because the dmtimer
      driver uses the TIDR register to determine the IP version.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      67d2e760
    • J
      ARM: OMAP2+: HWMOD: Correct timer device attributes · 139486fa
      Jon Hunter 提交于
      Fix the following issues with the timer device attributes for OMAP2+ devices:
      
      1. For OMAP24xx devices, timers 2-8 have the ALWAYS-ON attribute indicating
         that these timers are in an ALWAYS-ON power domain. This is not the case
         only timer1 is in an ALWAYS-ON power domain.
      2. For OMAP3xxx devices, timers 2-7 have the ALWAYS-ON attribute indicating
         that these timers are in an ALWAYS-ON power domain. This is not the case
         only timer1 and timer12 are in an ALWAYS-ON power domain.
      3. For OMAP3xxx devices, timer12 does not have the ALWAYS-ON attribute but
         is in an always-on power domain.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      139486fa
  3. 09 5月, 2012 2 次提交
    • K
      ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset · 414e4128
      Kevin Hilman 提交于
      Without runtime PM enabled, hwmod needs to leave all IP blocks in an
      enabled state by default so any driver access to the HW will succeed.
      This is accomplished by seting the postsetup_state to enabled for all
      hwmods during init when runtime PM is disabled.
      
      Currently, we have a special case for WDT in that its postsetup_state
      is always set to disabled.  This is done so that the WDT is disabled
      and the timer is disarmed at boot in case there is no WDT driver.
      This also means that when runtime PM is disabled, if a WDT driver *is*
      built in the kernel, the kernel will crash on the first access to the
      WDT hardware.
      
      We can't simply leave the WDT module enabled, because the timer is
      armed by default after reset. That means that if there is no WDT
      driver initialzed or loaded before the timer expires, the kernel will
      reboot.
      
      To fix this, a custom reset method is added to the watchdog class of
      omap_hwmod.  This method will *always* disarm the timer after hwmod
      reset.  The WDT timer then will only be rearmed when/if the driver is
      loaded for the WDT.  With the timer disarmed by default, we no longer
      need a special-case for the postsetup_state of WDT during init, so it
      is removed.
      
      Any platforms wishing to ensure the watchdog remains armed across the
      entire boot boot can simply disable the reset-on-init feature of the
      watchdog hwmod using omap_hwmod_no_setup_reset().
      
      Tested on 3530/Overo, 4430/Panda.
      
      NOTE: on 4430, the hwmod OCP reset does not seem to rearm the timer as
      documented in the TRM (and what happens on OMAP3.)  I noticed this
      because testing the HWMOD_INIT_NO_RESET feature with no driver loaded,
      I expected a reboot part way through the boot, but did not see a
      reboot.  Adding some debug to read the counter, I verified that right
      after OCP softreset, the counter is not firing.  After writing the
      magic start sequence, the timer starts counting.  This means that the
      timer disarm sequence added here does not seem to be needed for 4430,
      but is technically the correct way to ensure the timer is disarmed, so
      it is left in for OMAP4.
      
      Special thanks to Paul Walmsley for helping brainstorm ideas to fix
      this problem.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      [paul@pwsan.com: updated the omap2_wd_timer_reset() function in the
       wake of commit 3c55c1ba ("ARM:
       OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset
       wait for reset status""); added kerneldoc; rolled in warning fix from Kevin]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      414e4128
    • V
      ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database · c8d82ff6
      Vaibhav Hiremath 提交于
      Add 32k-sync timer hwmod-data and add ocp_if details to
      omap2 & 3 hwmod table.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      c8d82ff6
  4. 19 4月, 2012 1 次提交
  5. 26 1月, 2012 1 次提交
  6. 10 7月, 2011 3 次提交