1. 30 11月, 2022 32 次提交
  2. 29 11月, 2022 8 次提交
    • O
      !250 add UPROBE_ALTER_PC flag for uprobe mechanism · a5a6aebf
      openeuler-ci-bot 提交于
      Merge Pull Request from: @anatas 
       
      [Description]
      We try to implement a live-patch mechanism in the userspace based on the UPROBE.
      In the handler, we may change the PC register.
      In this case, UPROBE must skip the handle of the next instruction.
      
      [Testing]
      kernel options:
      UPROBES_SUPPORT_PC_ALTER=y
      
       
       
      Link:https://gitee.com/openeuler/kernel/pulls/250 
      Reviewed-by: Xu Kuohai <xukuohai@huawei.com> 
      Reviewed-by: Liu Chao <liuchao173@huawei.com> 
      Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      a5a6aebf
    • O
      !268 [OLK-5.10]perf arm64 metricgroup support and some bugfix · 1ec4733f
      openeuler-ci-bot 提交于
      Merge Pull Request from: @liujie-248683921 
       
      This series contains support to get basic metricgroups working for
      arm64 CPUs.
      
      Initial support is added for HiSilicon hip08 platform.
      
      Some sample usage on Huawei D06 board:
      
      $ ./perf list metric
      
      List of pre-defined events (to be used in -e):
      
      Metrics:
      
      bp_misp_flush
      [BP misp flush L3 topdown metric]
      branch_mispredicts
      [Branch mispredicts L2 topdown metric]
      core_bound
      [Core bound L2 topdown metric]
      divider
      [Divider L3 topdown metric]
      exe_ports_util
      [EXE ports util L3 topdown metric]
      fetch_bandwidth_bound
      [Fetch bandwidth bound L2 topdown metric]
      fetch_latency_bound
      [Fetch latency bound L2 topdown metric]
      fsu_stall
      [FSU stall L3 topdown metric]
      idle_by_icache_miss
      
      $ sudo ./perf stat -v -M core_bound sleep 1
      Using CPUID 0x00000000480fd010
      metric expr (exe_stall_cycle - (mem_stall_anyload + armv8_pmuv3_0@event=0x7005@)) / cpu_cycles for core_bound
      found event cpu_cycles
      found event armv8_pmuv3_0/event=0x7005/
      found event exe_stall_cycle
      found event mem_stall_anyload
      adding {cpu_cycles -> armv8_pmuv3_0/event=0x7001/
      mem_stall_anyload -> armv8_pmuv3_0/event=0x7004/
      Control descriptor is not initialized
      cpu_cycles: 989433 385050 385050
      armv8_pmuv3_0/event=0x7005/: 19207 385050 385050
      exe_stall_cycle: 900825 385050 385050
      mem_stall_anyload: 253516 385050 385050
      
      Performance counter stats for 'sleep':
      
      989,433 cpu_cycles # 0.63 core_bound
      19,207 armv8_pmuv3_0/event=0x7005/
      900,825 exe_stall_cycle
      253,516 mem_stall_anyload
      
         0.000805809 seconds time elapsed
      
         0.000875000 seconds user
         0.000000000 seconds sys
      perf stat --topdown is not supported, as this requires the CPU PMU to
      expose (alias) events for the TopDown L1 metrics from sysfs, which arm
      does not do. To get that to work, we probably need to make perf use the
      pmu-events cpumap to learn about those alias events.
      
      Metric reuse support is added for pmu-events parse metric testcase.
      This had been broken on power9 recently:
      https://lore.kernel.org/lkml/20210324015418.GC8931@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com/
      
      Differences to v2:
      
      Add TB and RB tags (Thanks!)
      Rename metricgroup__find_metric() from metricgroup_find_metric()
      Change resolve_metric_simple() to rescan after any insert
      Differences to v1:
      
      Add pmu_events_map__find() as arm64-specific function
      Fix metric reuse for pmu-events parse metric testcase
      John Garry (6):
      perf metricgroup: Make find_metric() public with name change
      perf test: Handle metric reuse in pmu-events parsing test
      perf pmu: Add pmu_events_map__find()
      perf vendor events arm64: Add Hisi hip08 L1 metrics
      perf vendor events arm64: Add Hisi hip08 L2 metrics
      perf vendor events arm64: Add Hisi hip08 L3 metrics
      
      tools/perf/arch/arm64/util/Build | 1 +
      tools/perf/arch/arm64/util/pmu.c | 25 ++
      .../arch/arm64/hisilicon/hip08/metrics.json | 233 ++++++++++++++++++
      tools/perf/tests/pmu-events.c | 83 ++++++-
      tools/perf/util/metricgroup.c | 12 +-
      tools/perf/util/metricgroup.h | 3 +-
      tools/perf/util/pmu.c | 5 +
      tools/perf/util/pmu.h | 1 +
      tools/perf/util/s390-sample-raw.c | 4 +-
      9 files changed, 356 insertions(+), 11 deletions(-)
      create mode 100644 tools/perf/arch/arm64/util/pmu.c
      create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
      
      Reference:https://patchwork.kernel.org/project/linux-arm-kernel/cover/1617791570-165223-1-git-send-email-john.garry@huawei.com/
      
      Bugfix:perf vendor events arm64: Fix incorrect metrics and improve readability
      First fix the incorrect hip08 metrics, then add some core events to the
      JSON file. Last, change the event code to the event name for improving
      readability.
      changes in v2:
      - adjust commit msg of 1st patch.
      - fix tab in 3rd patch.
      Shang XiaoJing (3):
        perf vendor events arm64: Fix incorrect Hisi hip08 L3 metrics
        perf vendor events arm64: Add HiSilicon hip08 core events
        perf vendor events arm64: Use event name instead of event code
       .../arm64/hisilicon/hip08/core-imp-def.json   | 132 ++++++++++++++++++
       .../arch/arm64/hisilicon/hip08/metrics.json   |  48 +++----
       2 files changed, 156 insertions(+), 24 deletions(-
      Reference:https://lore.kernel.org/all/20221021105035.10000-1-shangxiaojing@huawei.com/
       
       
      Link:https://gitee.com/openeuler/kernel/pulls/268 
      Reviewed-by: Cheng Jian <cj.chengjian@huawei.com> 
      Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      1ec4733f
    • O
      !282 Synchronize the code of mainline perf tool and support the parsing of TRBE trace data · baa5f88e
      openeuler-ci-bot 提交于
      Merge Pull Request from: @hejunhao3 
       
      
      ```shell
      Synchronize the code of mainline perf tool and support the parsing of TRBE trace data.
      
      [test log]
      estuary:/$ perf record -e /cs_etm/@trbe3/ -C 3 -o trace.data taskset -c 3 uname -a
      Linux (none) 5.10.0+ #7 SMP PREEMPT Thu Nov 24 11:26:48 CST 2022 aarch64 GNU/Linux
      [ perf record: Woken up 1 times to write data ]
      [ perf record: Captured and wrote 0.851 MB trace.data ]
      /estuary:/$ perf report --stdio -i trace.data -D > report.txt
      estuary:/$ grep -rn "ETE" report.txt
      5835:. ... CoreSight ETE Trace data: size 0xd0d00 bytes
      estuary:/$ grep -rn "I_ASYNC : Alignment Synchronisation." report.txt | tail -n 5
      497159:	Idx:816712; ID:7;	I_ASYNC : Alignment Synchronisation.
      499987:	Idx:820816; ID:7;	I_ASYNC : Alignment Synchronisation.
      502722:	Idx:824928; ID:7;	I_ASYNC : Alignment Synchronisation.
      505083:	Idx:829040; ID:7;	I_ASYNC : Alignment Synchronisation.
      507427:	Idx:833132; ID:7;	I_ASYNC : Alignment Synchronisation.
      estuary:/$   
      estuary:/$ perf record -e /cs_etm/@tmc_etr0/ -C 2 -o trace.data taskset -c 2 uname -a
      Linux (none) 5.10.0+ #7 SMP PREEMPT Thu Nov 24 11:26:48 CST 2022 aarch64 GNU/Linux
      [82501.067549] coresight tmc_etr0: timeout while waiting for completion of Manual Flush
      [ perf record: Woken up 1 times to write data ]
      [ perf record: Captured and wrote 0.690 MB trace.data ]
      /estuary:/$ perf report --stdio -i trace.data -D > report.txt
      estuary:/$ grep -rn "ETE" report.txt
      8528:. ... CoreSight ETE Trace data: size 0xa40d0 bytes
      estuary:/$ grep -rn "I_ASYNC : Alignment Synchronisation." report.txt | tail -n 5
      349615:	Idx:633382; ID:5;	I_ASYNC : Alignment Synchronisation.
      350304:	Idx:634786; ID:5;	I_ASYNC : Alignment Synchronisation.
      352589:	Idx:639200; ID:5;	I_ASYNC : Alignment Synchronisation.
      354957:	Idx:643604; ID:5;	I_ASYNC : Alignment Synchronisation.
      357246:	Idx:648003; ID:5;	I_ASYNC : Alignment Synchronisation.
      estuary:/$   
      estuary:/$ perf record -C 0 -e arm_spe_0/branch_filter=1/ -o branch.data  sleep 3s
      [ perf record: Woken up 1 times to write data ]
      [ perf record: Captured and wrote 0.663 MB branch.data ]
      estuary:/$ perf report -D -i branch.data > branch.log
      estuary:/$ grep -rn "B COND" branch.log  | tail -=n 5 
      133506:.  000996d4:  4a 01                                           B COND
      133517:.  0009970c:  4a 01                                           B COND
      133539:.  0009977c:  4a 01                                           B COND
      133572:.  00099824:  4a 01                                           B COND
      133671:.  00099a1c:  4a 01                                           B COND
      estuary:/$ perf -v
      perf version 5.10.gede0fc40b9bf
      ``` 
       
      Link:https://gitee.com/openeuler/kernel/pulls/282 
      Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      Reviewed-by: Ling Mingqiang <lingmingqiang@huawei.com> 
      Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      baa5f88e
    • O
      !283 [OLK-5.10] Add debug print of 64G link speed · bcad849d
      openeuler-ci-bot 提交于
      Merge Pull Request from: @xiaosuli3109 
       
      Fibre Channel has been the standard connection type for storage area networks (SAN) in enterprise storage. Despite its name, Fibre Channel signaling can run on both twisted pair copper wire and fiber-optic cables.
      
      The FibreChannel Gen7 adapter supports 64G link speeds. Add debug print support to the driver.
      
      Fix Issue: https://gitee.com/openeuler/kernel/issues/I6337O  
       
      Link:https://gitee.com/openeuler/kernel/pulls/283 
      Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      bcad849d
    • H
      LoongArch: defconfig: Set CONFIG_TXGBE=m by default · 3eb9c0b6
      Hongchen Zhang 提交于
      LoongArch inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I5OHOB
      
      --------------------------------
      
      Ensure the netswift 10G NIC driver ko can be distributed in ISO on
      LoongArch.
      Signed-off-by: NHongchen Zhang <zhanghongchen@loongson.cn>
      3eb9c0b6
    • B
      LS7A2000 : Add quirk for OHCI device rev 0x02 · 03489ad3
      Baoqi Zhang 提交于
      LoongArch inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I5OHOB
      
      --------------------------------
      Signed-off-by: NBaoqi Zhang <zhangbaoqi@loongson.cn>
      Change-Id: I7d70a63b5a813551b81f60f07dfedbbcd01d4336
      03489ad3
    • Q
      stmmac: pci: Add dwmac support for Loongson · 5e50208e
      Qing Zhang 提交于
      LoongArch inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I5OHOB
      
      --------------------------------
      
      This GMAC module is integrated into the Loongson-2K SoC and the LS7A
      bridge chip.
      
      commit 30bba69d upstream.
      
      Backport:
      stmmac: dwmac-loongson: fix uninitialized variable in loongson_dwmac_probe()
      stmmac: dwmac-loongson: Fix unsigned comparison to zero
      stmmac: dwmac-loongson:Fix missing return value
      stmmac: dwmac-loongson: change loongson_dwmac_driver from global to static
      stmmac: pci: Add LS7A support for dwmac-loongson
      
      This patch also disable dwmac FLOW_AUTO. Since DWMAC_LOONGSON do NOT support
      FLOW_AUTO.
      Signed-off-by: NQing Zhang <zhangqing@loongson.cn>
      Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NMing Wang <wangming01@loongson.cn>
      Change-Id: Ifefac7d47a05373ca7160d22a44d6c07b6a896e5
      5e50208e
    • L
      uprobe: add UPROBE_ALTER_PC flag for uprobe · 690ed1ed
      Longjun Luo 提交于
      hulk inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I61AXT
      CVE: N/A
      
      Within uprobe handlers, the pc register could be
      modified. In this situation, there is no need to
      do a single stepping. Just like the kprobe, we
      skip it.
      Signed-off-by: NLongjun Luo <luolongjun@huawei.com>
      690ed1ed