- 09 7月, 2015 1 次提交
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Enable SG support for Zynq SOC family devices. Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 6月, 2015 1 次提交
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由 Cyrille Pitchen 提交于
Add the compatible string for Atmel sama5d2 SoC family as the configuration options differ from other instances of the GEM. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 5月, 2015 1 次提交
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由 Nathan Sullivan 提交于
According to the Zynq TRM, gigabit half duplex is not supported. Add a new cap and compatible string so Zynq can avoid advertising that mode. Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 5月, 2015 1 次提交
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由 Nathan Sullivan 提交于
Describe the handler for RXUBR better with a new comment. Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Reviewied-by: NJosh Cartwright <joshc@ni.com> Reviewied-by: NBen Shelton <ben.shelton@ni.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 5月, 2015 1 次提交
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由 Dan Carpenter 提交于
The bitwise tests are always true here because it uses '|' where '&' is intended. Fixes: 98b5a0f4 ('net: macb: Add support for jumbo frames') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 5月, 2015 4 次提交
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由 Harini Katakam 提交于
Add macb_change_mtu callback; if jumbo frame support is present allow mtu size changes upto (jumbo max length allowed - headers). Signed-off-by: NHarini Katakam <harinik@xilinx.com> Reviewed-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
Enable jumbo frame support for Zynq Ultrascale+ MPSoC. Update the NWCFG register and descriptor length masks accordingly. Jumbo max length register should be set according to support in SoC; it is set to 10240 for Zynq Ultrascale+ MPSoC. Signed-off-by: NHarini Katakam <harinik@xilinx.com> Reviewed-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
Add compatible string and config structure for Zynq Ultrascale+ MPSoC Signed-off-by: NHarini Katakam <harinik@xilinx.com> Reviewed-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nathan Sullivan 提交于
The same hardware issue the at91 must work around applies to at least the Zynq ethernet, and possibly more devices. The driver also needs to handle the RXUBR interrupt since it turns it on with MACB_RX_INT_FLAGS anyway. Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 4月, 2015 1 次提交
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Under heavy Rx load, observed that the Hw is updating the USED bit and it is not updating the received frame status to the BD control field. This could be lack of resources for processing the BDs at high data rates. Driver drops the frame associated with this BD but not clearing the USED bit. So, this is causing hang condition as Hw expects USED bit to be cleared for this BD. Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 4月, 2015 1 次提交
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由 Ben Shelton 提交于
In 02c958dd (net/macb: add TX multiqueue support for gem), the initialization of tx_head and tx_tail in macb_init_rings() was moved inside the loop that iterates over each element in the ring. Since tx_head and tx_tail only need to be assigned once, move them back out of the loop. Signed-off-by: NBen Shelton <ben.shelton@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 4月, 2015 1 次提交
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由 Wolfgang Steinwender 提交于
The statistics are grouped by TX and RX errors. The SQE Test Errors Register indicates problems with TX. Signed-off-by: NWolfgang Steinwender <wsteinwender@pcs.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 4月, 2015 8 次提交
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由 Nicolas Ferre 提交于
As we need to check peripheral version from the hardware during probe, I introduce a little helper to unify these tests. It would prevent to de-synchronize the test like previously observed. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
We currently need two checks of the peripheral version in MACB_MID register. One of them got out of sync after modification by 8a013a9c (net: macb: Include multi queue support for xilinx ZynqMP ethernet version). Fix this in macb_configure_caps() so that xilinx ZynqMP will be considered as a GEM flavor. Fixes: 8a013a9c ("net: macb: Include multi queue support for xilinx ZynqMP ethernet version") Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Cc: <stable@vger.kernel.org> #4.0 (if it doesn't make it for -final) Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
User i/o register EMAC_USRIO or GMAC_UR can be found on both macb and gem flavors of the peripheral. By using the proper accessor, we can add it to the register dump feature of ethtool. Increment the version of this API so it can be noticed from user space. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
As accessing the peripheral registers need the clocks to be set, we have to enable them as soon as possible. Their configuration depend on the type of device used and determined by the DT compatible string. That lead to add another initialization function in the DT configuration structure. As the device private structure length depend on an information read in the registers, we have to store the clock pointers in temporary variables before feeding the structure fields. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
As a non-native English speaker, I would correct "capacities" of the macb peripheral to "capabilities": correct me if I'm wrong! Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
Capabilities configuration by macb_configure_caps() was moved far too late by 421d9df0 (net/macb: merge at91_ether driver into macb driver) which would lead to badly configured hardware. So, move this function to early probe and modify its prototype to re-gain its original behavior. DT data retrieval is also moved to simplify the probe code flow. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Cyrille Pitchen <cyrille.pitchen@atmel.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
As we access the MID register directly, we need to tell why we don't use the macb_is_gem() dedicated function. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
When merging at91_ether and macb driver during 421d9df0 (net/macb: merge at91_ether driver into macb driver) the probe function has been split. The code dealing with initialization of queues is now moved in macb_init() which needs information computed in the parent macb_probe() function. So, add the queue_mask information to the private structure and use it when needed in macb_init(). Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Cc: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 3月, 2015 1 次提交
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由 Jaeden Amero 提交于
The PHY state machine (in drivers/net/phy/phy.c) will unconditionally call phydev->adjust_link (macb_handle_link_change) when polling in the PHY_CHANGELINK state. As currently written, macb always ends up requesting a new tx_clk frequency in macb_handle_link_change. It is a waste of time to request a new tx_clk frequency if the link state hasn't changed, as the tx_clk will already be configured properly. Let's only request a new tx_clk clock frequency when necessary. Signed-off-by: NJaeden Amero <jaeden.amero@ni.com> Cc: Josh Cartwright <joshc@ni.com> Cc: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 3月, 2015 1 次提交
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由 Stephen Rothwell 提交于
The code removed by commit 421d9df0 ("net/macb: merge at91_ether driver into macb driver") should be removed in the merge resolution as well. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 3月, 2015 1 次提交
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由 Josh Cartwright 提交于
The configurations are not modified by the driver. Make them 'const' so that they may be placed in a read-only section. Signed-off-by: NJosh Cartwright <joshc@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 3月, 2015 3 次提交
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由 Cyrille Pitchen 提交于
macb and at91_ether drivers can be compiled as modules, but the at91_ether driver use some functions and variables defined in the macb one, thus creating a dependency on the macb driver. Since these drivers are sharing the same logic we can easily merge at91_ether into macb. In order to factorize common probing logic we've added an ->init() function to struct macb_config (the structure associated with the compatible string), and moved macb specific init code from macb_probe to macb_init. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Cyrille Pitchen 提交于
Most of the functions from the Common Clk Framework handle NULL pointer as input argument. Since the TX clock is optional, we now set tx_clk to NULL value instead of ERR_PTR(-ENOENT) when this clock is not available. This simplifies the clock management and avoid the need to test tx_clk value. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Boris BREZILLON 提交于
With multi platform support those sections could lead to unexpected behavior if both ARCH_AT91 and another ARM SoC using the MACB IP are selected. Add two new capabilities to encode the default MII mode and the presence of a CLKEN bit in USRIO register. Then define the appropriate config for IPs embedded in at91 SoCs. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 3月, 2015 2 次提交
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ZynqMP soc has single interrupt for all the queue events. So, passing the IRQF_SHARED flag for interrupt registration call. Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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Include multi queue support for the ethernet IP version in xilinx ZynqMP SoC. Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 3月, 2015 1 次提交
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由 Arun Chandran 提交于
Program management descriptor's access mode according to the dynamically detected CPU endianness. Signed-off-by: NArun Chandran <achandran@mvista.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 2月, 2015 1 次提交
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由 Arun Chandran 提交于
This patch converts all __raw_readl and __raw_writel function calls to their corresponding readl_relaxed and writel_relaxed variants. It also tells the driver to set ahb_endian_swp_mgmt_en bit in dma_cfg when the CPU is configured in big endian mode. Signed-off-by: NArun Chandran <achandran@mvista.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 2月, 2015 1 次提交
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由 Lad, Prabhakar 提交于
this patch fixes following sparse warning: macb.c:2038:26: warning: symbol 'gem_ethtool_ops' was not declared. Should it be static? Alongside drops exporting of gem_ethtool_ops as there is no need. Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 1月, 2015 2 次提交
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由 Michal Simek 提交于
Fix compilation warning: drivers/net/ethernet/cadence/macb.c:2415:12: warning: 'macb_suspend' defined but not used [-Wunused-function] static int macb_suspend(struct device *dev) drivers/net/ethernet/cadence/macb.c:2432:12: warning: 'macb_resume' defined but not used [-Wunused-function] static int macb_resume(struct device *dev) when CONFIG_PM=y, CONFIG_PM_SLEEP=n are used. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolae Rosia 提交于
The driver is trying to acquire clocks which maybe are not available yet. Allow the driver to request deffered probe by providing a probe function and registering it with module_platform_driver. [1] This patch is based on 3.19-rc5. [1] https://lkml.org/lkml/2013/9/23/118Signed-off-by: NNicolae Rosia <nicolae.rosia@certsign.ro> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 1月, 2015 2 次提交
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由 Xander Huff 提交于
10/100 MACB does not have the same statistics possibilities as GEM. Separate macb_ethtool_ops to make a new GEM-specific struct with the new statistics functions included. Signed-off-by: NXander Huff <xander.huff@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Xander Huff 提交于
Spaces should surround add, multiply, and bitshift operators. Signed-off-by: NXander Huff <xander.huff@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2015 1 次提交
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由 Xander Huff 提交于
Currently `ethtool -S` simply returns "no stats available". It would be more useful to see what the various ethtool statistics registers' values are. This change implements get_ethtool_stats, get_strings, and get_sset_count functions to accomplish this. Read all GEM statistics registers and sum them into macb.ethtool_stats. Add the necessary infrastructure to make this accessible via `ethtool -S`. Update gem_update_stats to utilize ethtool_stats. Signed-off-by: NXander Huff <xander.huff@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 12月, 2014 2 次提交
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由 Cyrille Pitchen 提交于
Inside macb_probe(), when devm_request_irq() fails on queue q, there is no need to call devm_free_irq() on queues 0..q-1 because the managed device resources are released later when calling free_netdev(). Also removing devm_free_irq() call from macb_remove() for the same reason. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Cyrille Pitchen 提交于
fix a bug introduced by the multiqueue support patch: "net/macb: add TX multiqueue support for gem" the "bp" pointer to the netdev private data was dereferenced and used after the associated memory had been freed by calling free_netdev(). Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 12月, 2014 1 次提交
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由 Cyrille Pitchen 提交于
gem devices designed with multiqueue CANNOT work without this patch. When probing a gem device, the driver must first prepare and enable the peripheral clock before accessing I/O registers. The second step is to read the MID register to find whether the device is a gem or an old macb IP. For gem devices, it reads the Design Configuration Register 6 (DCFG6) to compute to total number of queues, whereas macb devices always have a single queue. Only then it can call alloc_etherdev_mq() with the correct number of queues. This is the reason why the order of some initializations has been changed in macb_probe(). Eventually, the dedicated IRQ and TX ring buffer descriptors are initialized for each queue. For backward compatibility reasons, queue0 uses the legacy registers ISR, IER, IDR, IMR, TBQP and RBQP. On the other hand, the other queues use new registers ISR[1..7], IER[1..7], IDR[1..7], IMR[1..7], TBQP[1..7] and RBQP[1..7]. Except this hardware detail there is no real difference between queue0 and the others. The driver hides that thanks to the struct macb_queue. This structure allows us to share a common set of functions for all the queues. Besides when a TX error occurs, the gem MUST be halted before writing any of the TBQP registers to reset the relevant queue. An immediate side effect is that the other queues too aren't processed anymore by the gem. So macb_tx_error_task() calls netif_tx_stop_all_queues() to notify the Linux network engine that all transmissions are stopped. Also macb_tx_error_task() now calls spin_lock_irqsave() to prevent the interrupt handlers of the other queues from running as each of them may wake its associated queue up (please refer to macb_tx_interrupt()). Finally, as all queues have previously been stopped, they should be restarted calling netif_tx_start_all_queues() and setting the TSTART bit into the Network Control Register. Before this patch, when dealing with a single queue, the driver used to defer the reset of the faulting queue and the write of the TSTART bit until the next call of macb_start_xmit(). As explained before, this bit is now set by macb_tx_error_task() too. That's why the faulting queue MUST be reset by setting the TX_USED bit in its first buffer descriptor before writing the TSTART bit. Queue 0 always exits and is the lowest priority when other queues are available. The higher the index of the queue is, the higher its priority is. When transmitting frames, the TX queue is selected by the skb->queue_mapping value. So queue discipline can be used to define the queue priority policy. Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 12月, 2014 1 次提交
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由 Cyrille Pitchen 提交于
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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