We can now probe cpsw with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property for am3 and am4.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.
Signed-off-by: NTony Lindgren <tony@atomide.com>

We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.
Signed-off-by: NTony Lindgren <tony@atomide.com>

We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.
Signed-off-by: NTony Lindgren <tony@atomide.com>

We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.
Signed-off-by: NTony Lindgren <tony@atomide.com>

This header only contains platform_data. Move it to the proper directory.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NTony Lindgren <tony@atomide.com>

The omap2_spi_dev_attr data was used to supply instance-specific
data for legacy non-DT devices. The SPI legacy device support
including the usage of the hwmod class revision data has been
dropped in commit 6f3ab009 ("ARM: OMAP2+: Remove unused legacy
code for device init") and this data is therefore no longer needed.
So, cleanup the structure and all the associated data in various
hwmod data files.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The omap_gpio_dev_attr data was used to supply instance-specific
data for legacy non-DT devices. The GPIO legacy device support has
been cleaned up in commit 14944934 ("ARM: OMAP2+: Remove legacy
gpio code") a while ago and this data is therefore no longer needed.
So, cleanup the structure and all the associated data in various
hwmod data files.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

With all of mach-omap2 booting now in device tree only mode,
we can get the module IO range from device tree and just drop
the legacy hwmod struct omap_hwmod_addr_space.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Hardware random number generator is present in both AM33xx and AM43xx
SoC's. So moving the hwmod data to common data.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Devices that utilize the OCP registers and/or PRCM registers and
register bit fields should be modeled using hwmod. Since eQEP, ePWM and
eCAP don't fall under this category, remove their hwmod entries.

Instead these clocks simply use the clock that is passed through by its
parent PWMSS. Therefore, PWMSS handles the clock for itself and its
subdevices.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Without a hwmod for am43xx emif use counting for emif clockdomain does
not happen correctly so it may be shut off by pm code unintentionally.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Only a few files really need that platform header. When later splitting
omap_mmc_platform_data into omap_mmc and omap_mmc_hs, those files
declaring an hs mmc platform data will have to change the platform
include, which is a good sanity check.
Also removing omap242x_init_mmc, which is not used anywhere, checked
with grep.
Signed-off-by: NAndreas Fenkart <afenkart@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Most of IP's in AM335x is present on AM43x and so in those cases both
will use same hwmod database (except for a few cases where clock related
details differ), but there is difference w.r.t register offset between
these. Update register offsets at runtime based on the SoC detected to
help in sharing otherwise same hwmod.
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Acked-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

AM335x and AM43x have most of the IP's and interconnect's similar.
Instead of adding redundant hwmod data, move interconnects and hwmod
similar between AM335x and AM43x to a common location. This helps in
reuse on AM43x.

AM335x interconnects that has difference and not present in AM43x are
not moved. ocp clock of those in l4_wkup is fed from a different source
for AM43x. Also pruss interconnect is different.

AM335x hwmod's that has difference other than prcm register offsets
(difference is in clocks of wkup_m3, control, gpio0, debugss and clock
domain of l4_hs, adc_tsc as compared to AM43x) and those that are not
present in AM43x are not moved.
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Acked-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add RNG hwmod data for AM33xx SoC.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

For modules/IPs/hwmods which do not have
-1- sys->class->reset()
and
-2- hardreset lines
and
-3- No way to do an ocp reset (no sysc control)
the flag 'HWMOD_INIT_NO_RESET' is not much useful.

Cleanup all such instances across various hwmod data files.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add the missing sysc configuration to the AM335 spinlock hwmod
data. This ensures that smart-idle is enabled whenever the module
is enabled by the driver.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

In the original hwmod data file, DebugSS entry was disabled,
since we didn't (and do not) have SW to control it.

This patch enables it back with right data, so that it can be
controlled by different ways; and the suggested method it to
have modular driver for debugSS as well.

Refer to the link for more discussion on handling of debugSS -
https://patchwork.kernel.org/patch/2212111/Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Register target address to be used for cpgmac is the second device
address space. By default, hwmod picks first address space (0th index)
for register target.

With removal of address space from hwmod and using DT instead, cpgmac
is getting wrong address space for register target.

Fix it by indicating the address space to be used for register target.
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

With commit '82702ea1' "ARM: OMAP2+:
Fix serial init for device tree based booting" stubbing out
omap_serial_early_init() for Device tree based booting, there was a
crash observed on AM335x based devices when hwmod does a
_setup_reset() early at boot.

This was rootcaused to hwmod trying to reset console uart while
earlycon was using it.  The way to tell hwmod not to do this is to
specify the HWMOD_INIT_NO_RESET flag, which were infact set by the
omap_serial_early_init() function by parsing the cmdline to identify
the console device.

Parsing the cmdline to identify the uart used by earlycon itself seems
broken as there is nothing preventing earlycon to use a different one.

This patch, instead, attempts to populate the requiste flags for hwmod
based on the CONFIG_DEBUG_OMAPxUARTy FLAGS. This gets rid of the need
for cmdline parsing in the DT as well as non-DT cases to identify the
uart used by earlycon.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Reported-by: NMark Jackson <mpfj-list@newflow.co.uk>
Reported-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: NMark Jackson <mpfj-list@newflow.co.uk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

GFX has a reset status register (PRM_GFX.RM_GFX_RSTST),
so update the GFX hwmod data with .rstst_off and .st_shift
information.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

AM33XX only supports DT boot mode and with addition of
extracting module resources like, irq, dma and address space
from DT block, so now we can remove duplicate information from
hwmod data file.

This patch cleanups-up/deletes,

     - All references to "omap_hwmod_irq_info" data.
     - All references to "omap_hwmod_dma_info" data.
     - References to "omap_hwmod_addr_space" of the modules
       for which DT node is available with required address
       space information.
     - For the modules where "sysc" field is not applicable,
       we don't need module address space, so remove them as well.
     - The hwmod like firewall etc which are not useful are also
       deleted.

This cleanup gets us around ~1100 LOC of negative diff.
Patch is boot tested on AM335x-EVM along with below modules -
	- Matrix-keypad
	- Volume up/down keys
	- Ethernet
	- RTC
	- WDT
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: NSricharan R <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The UART2 hwmod structure is pointing to the EDMA channels of UART1,
which doesn't look right. This patch fixes this by making the UART2
hwmod structure to a new structure that lists the EDMA channels to be
used by the UART2.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NVaibhav Hiremath <hvaibhav@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

OMAP UART IP needs software control for slave idle modes based on functional
state of the IP. i.e The IP slave idle settings should be set to 'noidle' when
being used and then put back to 'smart_idle' when unused. Currently this is
handled by the driver with function pointers implemented in platform code.
This however breaks in case of device tree because of missing idle handling
APIs.

Previous patches in this series added a flag HWMOD_SWSUP_SIDLE_ACTIVE which
takes care of the mentioned requirement. Hence add the flag for all UART IPs
to take advantage of feature supported by framework.

Subsequent patches removes the slave idle handling from driver code.
Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: NSourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>  # OMAP4/Panda
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn
makes sure that sysc idle bit-fields are configured to valid state on
enable/disable callbacks.

With the recent submitted patch from Santosh Shilimkar,
"ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc"
(commit: 4a98c2d89), it is required to add sysconf
information to each valid hwmod entry, else device will not be
come out from idle state properly and leads to below kernel
crash  -

[2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at
0xf9e35034
[2.198325] Internal error: : 1028 [#1] SMP ARM
[2.203101] Modules linked in:
[2.206334] CPU: 0    Not tainted  (3.9.0-rc3-00059-gd114294#1)
[2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60
[2.218090] LR is at omap_wdt_probe+0x184/0x1fc
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>

Update the AES0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Update the SHA0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

struct omap_hwmod records belonging to wkup m3 domain is missing
HWMOD_NO_IDLEST flags; add them.

This patch is a prerequisite for a subsequent patch, 'ARM: OMAP2:
am33xx-hwmod: Fix "register offset NULL check" bug'.  That patch would
otherwise attempt to read from reserved bits.
Signed-off-by: NHebbar Gururaja <gururaja.hebbar@ti.com>
[paul@pwsan.com: add some more explanation in the patch description]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP & EHRPWM). To handle
resource sharing & IP integration  rework on parent child relation
between PWMSS and ECAP, EQEP & EHRPWM child devices to support runtime PM.
Signed-off-by: NPhilip Avinash <avinashphilip@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

EQEP IP block integration data is not present in HWMOD data. Also
address ranges specified for EACP & EHRPWM are not correct & HWMOD
flags of ADDR_TYPE_RT are added to PWM subsystem register address
space. This patch:
1. Corrects register address mapping for ECAP & EHRPWM
2. Removes  HWMOD flags in PWM submodule register address space.
3. Adds EQEP HWMOD entries.
Signed-off-by: NPhilip Avinash <avinashphilip@ti.com>
[paul@pwsan.com: tweaked patch description]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.

CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START
This led to having a resource list of 100s of IRQs.

Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add
AM33XX HWMOD data) that probably had some search and replace updates
done for the patch for sparse irq support.
Signed-off-by: NPantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated wit information about the breaking commit]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 70384a6a ("ARM: OMAP3+:
hwmod: Add AM33XX HWMOD data for davinci_mdio module") adds two
new sparse warnings:

arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2518:30: warning: symbol 'am33xx_mdio_addr_space' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2526:26: warning: symbol 'am33xx_cpgmac0__mdio' was not declared. Should it be static?

Fix by marking the two new records as static.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Peter Korsgaard <jacmet@sunsite.dk>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>

The OMAP_I2C_FLAG_RESET_REGS_POSTIDLE is not used anymore
in the i2c driver. Remove the flag.
Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

This patch adds hwmod entry for davinci MDIO module,
creating parent<->child relationship between CPSW and MDIO module.

This Parent-child relation is required in order to use common resources
like, clock, but still maintaining the logical separation between them.

CPGMAC SubSystem consist of various sub-modules, like, mdio, cpdma,
cpsw, etc... These sub-modules are also used in some of Davinci
family of devices, so separate and independent platform devices &
drivers for CPSW and MDIO is implemented.
In case of AM33XX, the resources are shared and common register
bit-field is provided to control module/clock enable/disable,
makes it difficult to handle common resources from both drivers.

So the solution is, create parent<->child relationship between
CPGMAC & MDIO modules.
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NRichard Cochran <richardcochran@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We want to remove plat/cpu.h. To do this, let's first split
it to private soc.h to mach-omap1 and mach-omap2. We have to
keep plat/cpu.h around until the remaining drivers are fixed,
so let's include the local soc.h in plat/cpu.h and for drivers
still including plat/cpu.h.

Once the drivers are fixed not to include plat/cpu.h, we
can remove the file.

This is needed for the ARM common zImage support.

[tony@atomide.com: updated to not print a warning]
Signed-off-by: NTony Lindgren <tony@atomide.com>