The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The previous _ecc removal / cleanup broke (i)nftl module usage.
Export the missing symbol.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Both drivers can not be fixed and compiled due to missing header files.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

MTD clients are agnostic of FLASH which needs ECC suppport.
Remove the functions and fixup the callers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

These functions were never implemented and added only bloat to
partition and concat code.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

NAND writev(_ecc) support is not longer necessary. Remove it.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Fix the diskonchip ecc setup.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

First step of modularizing ECC support.
- Move ECC related functionality into a seperate embedded data structure
- Get rid of the hardware dependend constants to simplify new ECC models
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Seperate functionality out of nand_scan so the code is more
readable. No functional change. First step of simplifying
the nand driver.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The NAND driver used a mix of unsigned char, u_char amd uint8_t
data types. Consolidate to uint8_t usage
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

NDFC NAND Flash controller is embedded in PPC EP44x SoCs.
Add platform driver based support.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Replace the chip lock by a the controller lock. For simple drivers a
dummy controller structure is created by the scan code.
This simplifies the locking algorithm in nand_get/release_chip().
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Unrolling the loops produces denser and much faster code.
Add a config switch which allows to select the byte order of the
resulting ecc code. The current Linux implementation has a byte
swap versus the SmartMedia specification
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be
  cleared.
o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for
  STMicro and Intel Sibley flashes with internal ECC.  Those flashes
  disallow clearing of single bits, unlike regular NOR flashes, so the
  new flag models their behaviour better.
o Remove MTD_ECC.  After the STMicro/Sibley merge, this flag is only set
  and never checked.
Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>

At least two flashes exists that have the concept of a minimum write unit,
similar to NAND pages, but no other NAND characteristics.  Therefore, rename
the minimum write unit to "writesize" for all flashes, including NAND.
Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>

The patch below adds support for the NAND device on the Amstrad Delta.
This is a 32MiB 8bit Toshiba device, with the data bus connected to the
OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the
Delta's latch2 16bit latch.
Signed-Off-By: NJonathan McDowell <noodles@earth.li>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

    On AMD Au1550 the static bus controller fails to keep -CE asserted during
chip ready delay on read commands and the NAND chip being used requires this.
So, the current driver allows nand_base.c to drive -CE manually during the
entire sector read. When the PCMCIA driver is enabled however, occasionally
the ECC errors occur on NAND reads. This happens because the PCMCIA driver
polls sockets periodically and reads one of the board's control/status regs
(BCSRs) which are on the same static bus as the NAND flash, and just use
another chip select (and the NOR flash also resides on that bus), so as the
NAND driver forces NAND chip select asserted and the -RE signal is shared, a
contention occurs on the static bus when BCSR or NOR flash is read while we're
reading from NAND.
    So, we either can't keep interrupts enabled during the whole NAND sector
read (which is hardly acceptable), or have to implement some interlocking
scheme between multiple drivers (which is painful, and makes me shudder :-).
    There's a third way which has proven to work: to force -CE asserted only
while we're waiting for a NAND chip to become ready after a read command,
disabling interrupts for a maximum of 25 microseconds (according to Toshiba
TC58DVM92A1FT00 datasheet -- this chip is mentioned in the board schematics);
for Samsung NAND chip which seems to be actually used this delay is even less,
12 us.
Signed-off-by: NKonstantin Baydarov <kbaidarov@ru.mvista.com>
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

     During the last cleanup of the AMD Au1550 NAND driver the old buglet was
reintroduced: as the MEM_STNDCTL register is write-only and seem to always
read as 0x31, read-modify-write to it done in au1xxx_nand_init() will have the
side effect of enabling -RCS0/1 pin override (via bits 4/5 of this reg.), thus
possibly causing a contention on the static bus when the NOR flash (using
-RCS0) or board control status registers (using -RCS2) are read. Luckily, this
goes away with a first NAND access, since au1550_hwcontrol() doesn't try to
read this register before writing anymore.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

We all inherited the same error from the original NAND board driver which
got copied and changed. Fix them all at once...
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Make it work even with compilers which lack the wit to notice that
THIS_MODULE is always non-NULL. Use #ifdef MODULE instead. It's only
a temporary debugging check anyway.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The _board_ driver needs to be mtd->owner, and it in turn pins the
nand.ko module. Fix them all to actually do that, and fix nand.ko not to
overwrite it -- and also to check that the caller sets it, if the caller
is a module.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

It was just too painful to deal with.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

We were scanning for 0xFF through the entire chip -- which takes a while
when it's a 512MiB device as I have on my current toy. The specs only say
we need to check certain bytes -- so do only that.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

- Implement HW ECC support,
- Provide read_buf() and write_buf() routines using memcpy
- Use on-flash bad block table
- Fix module refcounting
- Avoid read/modify/write in hwcontrol()
- Minor cosmetic fixes

Partly based on code and ideas from Tom Sylla <tom.sylla@amd.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

These new chips have 128KiB blocks. Don't try to kmalloc that.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NEgry Gábor <gaboregry@t-online.hu>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This lacks hardware ECC support and a few optimisations we're going to
want fairly soon, but it works well enough to mount and use JFFS2.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The TS-72xx is a series of embedded single board computers from
Technologic Systems based on the Cirrus ep93xx (arm920t based) CPU.

The TS-7200 uses NOR flash, while all the other models in the series
(TS-7250, TS-7260) use NAND flash -- included is a driver for the NAND
flash on those boards.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Correct the MTD NAND partition size for Poodle (Sharp Zaurus SL-5600)
Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Use ARRAY_SIZE macro instead of sizeof(x)/sizeof(x[0]) and remove
duplicates of the macro.
Signed-off-by: NTobias Klauser <tklauser@nuerscht.ch>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: NDavid Woodhouse <dwmw2@infradead.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

MTD_NAND=m and MTD_NAND_SHARPSL=y or MTD_NAND_NANDSIM=y are illegal
combinations that mustn't be allowed.

This patch fixes this bug by making MTD_NAND_SHARPSL and MTD_NAND_NANDSIM
tristate's.

Additionally, it fixes some whitespace damage at these options.
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Acked-by: NRichard Purdie <rpurdie@rpsys.net>
Acked-by: N"Artem B. Bityutskiy" <dedekind@yandex.ru>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: NDavid Woodhouse <dwmw2@infradead.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Remove the "inline" keyword from a bunch of big functions in the kernel with
the goal of shrinking it by 30kb to 40kb
Signed-off-by: NArjan van de Ven <arjan@infradead.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Acked-by: NJeff Garzik <jgarzik@pobox.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

ICC likes to complain about storage class not being first, GCC doesn't
care much (except for cases like "inline static").
have a hard time seeing how it could break anything.

Thanks to Gabriel A. Devenyi for pointing out
http://linuxicc.sourceforge.net/ which is what made me create this patch.
Signed-off-by: NJesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This is needs to be visible to other architectures using the AMBA
bus and peripherals.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It seems that clk_use() and clk_unuse() are additional complexity
which isn't required anymore.  Remove them from the clock framework
to avoid the additional confusion which they cause, and update all
ARM machine types except for OMAP.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch contains the following possible cleanups:
- every file should #include the headers containing the prototypes for
  it's global functions
- make needlessly global functions static
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>