- 21 3月, 2012 8 次提交
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由 Alex Deucher 提交于
The hw no longer has the bits and the table is removed. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Tom Stellard 提交于
The maximum number of pipes is needed by the user space compute driver to calculate the number of wavefronts per thread group. Signed-off-by: NTom Stellard <thomas.stellard@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 20 3月, 2012 16 次提交
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由 Michel Dänzer 提交于
Only radeon_gem_object_unpin was used anymore, in only one place. Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Michel Dänzer 提交于
The hardware only takes 27 bits for the offset, so larger offsets are truncated, and the display shows random bits other than the intended ones. Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Michel Dänzer 提交于
The hardware only takes 27 bits for the offset, so larger offsets are truncated, and the hardware cursor shows random bits other than the intended ones. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46796 Cc: stable@vger.kernel.org Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Tvrtko Ursulin 提交于
On a system with one HDMI and one VGA connector the latter causes output polling to run every ten seconds. This causes full EDID re-fetch on every poll and approx. 100ms rendering stalls are experienced by full screen page-flipping applications. Optimisation is to trust HPD sense on R600+ ASICs and to skip doing these expensive probes unless HPD sense has changed. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=47007 agd5f: fix patch and message formatting. Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@onelan.co.uk> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
vbios lists DVI-I port as VGA and DVI-D. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=47007Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
We digital encoders have a detect function as well (for DP to VGA bridges), so we make sure we choose the analog one here. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=47007Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Julia Lawall 提交于
The function radeon_cs_parser_init is only called from two places, in drivers/gpu/drm/radeon/radeon_cs.c and drivers/gpu/drm/radeon/r600_cs.c. In each case, if the call fails another function is called that frees all of the kdata and dpage information in the chunks array. So this information should not be freed in radeon_cs_parser_init as well. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
DisplayPort spec v1.1a, Table 2-52. Same commit to Intel by ajax in 9962c925Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
and document the other unused ones. Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
There are also two fixes: - In DRAW_INDEX_2, we read idx_value, but should have read idx+1. - When correcting SQ_VTX_CONSTANT_WORD1_0.SIZE, we should subtract the offset. Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 08 3月, 2012 2 次提交
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由 Alex Deucher 提交于
All pre-SI chips are limited to 165 Mhz for single link. Code in question will be re-enabled when SI support is added. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=44755 https://bugzilla.kernel.org/show_bug.cgi?id=42887Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Marek Olšák 提交于
Mesa may set it to 1, causing all primitives to be killed. v2: also update the r7xx code Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 07 3月, 2012 2 次提交
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由 Dave Airlie 提交于
We've been getting occasional oops running a 32-bit kernel on a certain system in our RHEL test hw. It appears that we fail to get sufficent ioremap space for the framebuffer, and this leads to an oops. This patch should fix the oops and leave a message in the logs we can check for. A future fix would probably to resize the console to a size that we can ioremap. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
The out of order execution of semaphore commands on pre cayman asics doesn't work correctly and can cause deadlocks, so turn it off for now. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 01 3月, 2012 1 次提交
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由 Sebastian Biemueller 提交于
The bo is removed from the list at the top of radeon_vm_bo_rmv(), but then the list is used in radeon_vm_bo_update_pte() to look up the vm. remove the bo_list entry at the end of the function instead. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <j.glisse@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 2月, 2012 11 次提交
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由 Felix Kuehling 提交于
This fixes page-flip-related flickering observed on Iconia Tab W500. The update_pending status returned by radeon_page_flip is very accurate on Avivo-based ASICs when vpos is negative. Experiments were conducted on several ASIC generations ranging from RS690 to Cayman where the page flip was artificially timed to occur at a specific vpos. With negative vpos, overriding update_pending always lead to flickering. The same experiment on RV380 and RV410 showed that update_pending is not accurate with negative vpos. In most cases update_pending == 1 is returned although the flip would complete before the start of the next frame. Therefore I left the behaviour unchanged for pre-AVIVO ASICs for performance reasons, although this may result in flickering in rare cases. This change also makes the logic a little easier to understand. Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NMario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Without this fix the driver randomly treats textures as arrays and I'm really wondering why gcc isn't complaining about it. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
v2: fix typo. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up the radeon_asic struct. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up radeon_asic struct. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up the radeon_asic struct. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up the radeon_asic struct. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Each ring type may need a different variant. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up the radeon_asic struct. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
tidy up the radeon_asic struct, handle multiple rings better. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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