1. 20 10月, 2019 1 次提交
  2. 09 10月, 2019 3 次提交
  3. 11 9月, 2019 1 次提交
  4. 19 8月, 2019 2 次提交
  5. 10 8月, 2019 1 次提交
    • H
      net: hns3: fix interrupt clearing error for VF · 13050921
      Huazhong Tan 提交于
      Currently, VF driver has two kinds of interrupts, reset & CMDQ RX.
      For revision 0x21, according to the UM, each interrupt should be
      cleared by write 0 to the corresponding bit, but the implementation
      writes 0 to the whole register in fact, it will clear other
      interrupt at the same time, then the VF will loss the interrupt.
      But for revision 0x20, this interrupt clear register is a read &
      write register, for compatible, we just keep the old implementation
      for 0x20.
      
      This patch fixes it, also, adds a new register for reading the interrupt
      status according to hardware user manual.
      
      Fixes: e2cb1dec ("net: hns3: Add HNS3 VF HCL(Hardware Compatibility Layer) Support")
      Fixes: b90fcc5b ("net: hns3: add reset handling for VF when doing Core/Global/IMP reset")
      Signed-off-by: NHuazhong Tan <tanhuazhong@huawei.com>
      Reviewed-by: NYunsheng Lin <linyunsheng@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      13050921
  6. 02 8月, 2019 2 次提交
    • H
      net: hns3: clear reset interrupt status in hclge_irq_handle() · 72e2fb07
      Huazhong Tan 提交于
      Currently, the reset interrupt is cleared in the reset task, which
      is too late. Since, when the hardware finish the previous reset,
      it can begin to do a new global/IMP reset, if this new coming reset
      type is same as the previous one, the driver will clear them together,
      then driver can not get that there is another reset, but the hardware
      still wait for the driver to deal with the second one.
      
      So this patch clears PF's reset interrupt status in the
      hclge_irq_handle(), the hardware waits for handshaking from
      driver before doing reset, so the driver and hardware deal with reset
      one by one.
      
      BTW, when VF doing global/IMP reset, it reads PF's reset interrupt
      register to get that whether PF driver's re-initialization is done,
      since VF's re-initialization should be done after PF's. So we add
      a new command and a register bit to do that. When VF receive reset
      interrupt, it sets up this bit, and PF finishes re-initialization
      send command to clear this bit, then VF do re-initialization.
      
      Fixes: 4ed340ab ("net: hns3: Add reset process in hclge_main")
      Signed-off-by: NHuazhong Tan <tanhuazhong@huawei.com>
      Reviewed-by: NYunsheng Lin <linyunsheng@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      72e2fb07
    • H
      net: hns3: fix some reset handshake issue · 6b428b4f
      Huazhong Tan 提交于
      Currently, the driver sets handshake status to tell the hardware
      that the driver have downed the netdev and it can continue with
      reset process. The driver will clear the handshake status when
      re-initializing the CMDQ, and does not recover this status
      when reset fail, which may cause the hardware to wait for
      the handshake status to be set and not being able to continue
      with reset process.
      
      So this patch delays clearing handshake status just before UP,
      and recovers this status when reset fail.
      
      BTW, this patch adds a new function hclge(vf)_reset_handshake() to
      deal with the reset handshake issue, and renames
      HCLGE(VF)_NIC_CMQ_ENABLE to HCLGE(VF)_NIC_SW_RST_RDY which
      represents this register bit more accurately.
      
      Fixes: ada13ee3 ("net: hns3: add handshake with hardware while doing reset")
      Signed-off-by: NHuazhong Tan <tanhuazhong@huawei.com>
      Reviewed-by: NPeng Li <lipeng321@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6b428b4f
  7. 29 7月, 2019 1 次提交
  8. 06 7月, 2019 2 次提交
  9. 29 6月, 2019 1 次提交
  10. 26 6月, 2019 1 次提交
  11. 15 6月, 2019 1 次提交
  12. 10 6月, 2019 5 次提交
  13. 29 5月, 2019 4 次提交
  14. 04 5月, 2019 1 次提交
    • J
      net: hns3: add support for multiple media type · 88d10bd6
      Jian Shen 提交于
      Previously, we can only identify copper and fiber type, the
      supported link modes of port information are always showing
      SR type. This patch adds support for multiple media types,
      include SR, LR CR, KR. Driver needs to query the media type
      from firmware periodicly, and updates the port information.
      
      The new port information looks like this:
      Settings for eth0:
              Supported ports: [ FIBRE ]
              Supported link modes:   25000baseCR/Full
                                      25000baseSR/Full
                                      1000baseX/Full
                                      10000baseCR/Full
                                      10000baseSR/Full
                                      10000baseLR/Full
              Supported pause frame use: Symmetric
              Supports auto-negotiation: No
              Supported FEC modes: None BaseR
              Advertised link modes:  Not reported
              Advertised pause frame use: No
              Advertised auto-negotiation: No
              Advertised FEC modes: Not reported
              Speed: 10000Mb/s
              Duplex: Full
              Port: FIBRE
              PHYAD: 0
              Transceiver: internal
              Auto-negotiation: off
              Current message level: 0x00000036 (54)
                                     probe link ifdown ifup
              Link detected: yes
      
      In order to be compatible with old firmware which only support
      sfp speed, we remained using the same query command, and kept
      the former logic.
      Signed-off-by: NJian Shen <shenjian15@huawei.com>
      Signed-off-by: NPeng Li <lipeng321@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      88d10bd6
  15. 27 4月, 2019 2 次提交
  16. 20 4月, 2019 3 次提交
  17. 15 4月, 2019 1 次提交
  18. 09 4月, 2019 3 次提交
  19. 05 4月, 2019 1 次提交
  20. 20 3月, 2019 1 次提交
  21. 25 2月, 2019 2 次提交
  22. 03 2月, 2019 1 次提交