- 30 7月, 2019 4 次提交
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由 Michael Chan 提交于
The new TPA implemantation has additional TPA counters that extend the per-ring statistics block. Allocate the proper size accordingly. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
The new TPA feature on 57500 supports a larger number of concurrent TPAs (up to 1024) divided among the functions. We need to add some logic to map the hardware TPA ID to a software index that keeps track of each TPA in progress. A 1:1 direct mapping without translation would be too wasteful as we would have to allocate 1024 TPA structures for each RX ring on each PCI function. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
Add an aggregation array to bnxt_tpa_info struct to keep track of the aggregation completions. The aggregation completions are not completed at the TPA_END completion on 57500 chips so we need to keep track of them. The array is only allocated on the new chips when required. An agg_count field is also added to keep track of the number of these completions. The maximum concurrent TPA is now discovered from firmware instead of the hardcoded 64. Add a new bp->max_tpa to keep track of maximum configured TPA. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
The new chips have a slightly modified TPA interface for LRO/GRO_HW. Modify the TPA structures so that the same structures can also be used on the new chips. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 7月, 2019 3 次提交
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由 Andy Gospodarek 提交于
This removes contention over page allocation for XDP_REDIRECT actions by adding page_pool support per queue for the driver. The performance for XDP_REDIRECT actions scales linearly with the number of cores performing redirect actions when using the page pools instead of the standard page allocator. v2: Fix up the error path from XDP registration, noted by Ilias Apalodimas. Signed-off-by: NAndy Gospodarek <gospo@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Gospodarek 提交于
This adds basic support for XDP_REDIRECT in the bnxt_en driver. Next patch adds the more optimized page pool support. Signed-off-by: NAndy Gospodarek <gospo@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
__bnxt_xmit_xdp() is used by XDP_TX and ethtool loopback packet transmit. Refactor it so that it can be re-used by the XDP_REDIRECT logic. Restructure the TX interrupt handler logic to cleanly separate XDP_TX logic in preparation for XDP_REDIRECT. Acked-by: NAndy Gospodarek <gospo@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 6月, 2019 2 次提交
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由 Tal Gilboa 提交于
Moved all logic from dim.h and net_dim.h to dim.c and net_dim.c. This is both more structurally appealing and would allow to only expose externally used functions. Signed-off-by: NTal Gilboa <talgi@mellanox.com> Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
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由 Tal Gilboa 提交于
Removed 'net' prefix from functions and structs used by external drivers. Signed-off-by: NTal Gilboa <talgi@mellanox.com> Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
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- 23 5月, 2019 2 次提交
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由 Michael Chan 提交于
Skip RDMA context memory allocations, reduce to 1 ring, and disable TPA when running in the kdump kernel. Without this patch, the driver fails to initialize with memory allocation errors when running in a typical kdump kernel. Fixes: cf6daed0 ("bnxt_en: Increase context memory allocations on 57500 chips for RDMA.") Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
When making configuration changes, the driver calls bnxt_close_nic() and then bnxt_open_nic() for the changes to take effect. A parameter irq_re_init is passed to the call sequence to indicate if IRQ should be re-initialized. This irq_re_init parameter needs to be included in the bnxt_reserve_rings() call. bnxt_reserve_rings() can only call pci_disable_msix() if the irq_re_init parameter is true, otherwise it may hit BUG() because some IRQs may not have been freed yet. Fixes: 41e8d798 ("bnxt_en: Modify the ring reservation functions for 57500 series chips.") Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 5月, 2019 5 次提交
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由 Michael Chan 提交于
Query support for the aRFS ring table index in the firmware. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Devesh Sharma 提交于
In newer firmware, the context memory for MR (Memory Region) and AH (Address Handle) to support RDMA are specified separately. Modify driver to specify and allocate the 2 context memory types separately when supported by the firmware. Signed-off-by: NDevesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
HWRM_VER_GET firmware command returns package name that is running actively on the adapter. Use this version instead of parsing from the package log in NVRAM. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
Newer firmware now advertises the capability for extended stats support. Check the new capability in addition to the existing version check. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
Gather periodic PCIe statistics for ethtool -S. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 2月, 2019 1 次提交
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由 Michael Chan 提交于
The code waits up to 20 usec for the firmware response to complete once we've seen the valid response header in the buffer. It turns out that in some scenarios, this wait time is not long enough. Extend it to 150 usec and use usleep_range() instead of udelay(). Fixes: 9751e8e7 ("bnxt_en: reduce timeout on initial HWRM calls") Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 2月, 2019 1 次提交
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由 Michael Chan 提交于
Newer firmware understands the concept of a trusted VF, so propagate the trusted VF attribute set by the PF admin. to the firmware. Also, check the firmware trusted setting when considering the VF MAC address change and reporting the trusted setting to the user. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2019 1 次提交
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由 Florian Fainelli 提交于
BNXT only supports SWITCHDEV_ATTR_ID_PORT_PARENT_ID, which makes it a great candidate to be converted to use the ndo_get_port_parent_id() NDO instead of implementing switchdev_port_attr_get(). The conversion is straight forward here since the PF and VF code use the same getter. Since bnxt makes uses of switchdev_port_same_parent_id() convert it to use netdev_port_same_parent_id(). Acked-by: NJiri Pirko <jiri@mellanox.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 1月, 2019 1 次提交
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由 Vasundhara Volam 提交于
Register devlink_port with devlink and create initial port params table for bnxt_en. The table consists of a generic parameter: wake_on_lan: Enables Wake on Lan for this port when magic packet is received with this port's MAC address using ACPI pattern. If enabled, the controller asserts a wake pin upon reception of WoL packet. ACPI (Advanced Configuration and Power Interface) is an industry specification for the efficient handling of power consumption in desktop and mobile computers. v2->v3: - Modify bnxt_dl_wol_validate(), to throw error message when user gives value other than DEVLINK_PARAM_WAKE_MAGIC ot to disable WOL. - Use netdev_err() instead of netdev_warn(), when devlink_port_register() and devlink_port_params_register() returns error. Also, don't log rc in this message. Cc: Michael Chan <michael.chan@broadcom.com> Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 12月, 2018 8 次提交
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由 Venkat Duvvuru 提交于
Older firmware only supports 16-bit flow handle, because of which the number of flows that can be offloaded can’t scale beyond a point. Newer firmware supports 64-bit flow handle enabling the host to scale upto millions of flows. With the new 64-bit flow handle support, driver has to query flow stats in a different way compared to the older approach. This patch adds support for 64-bit flow handle and new way to query flow stats. Signed-off-by: NVenkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Reviewed-by: NSriharsha Basavapatna <sriharsha.basavapatna@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
If RDMA is supported on the 57500 chip, increase context memory allocations for the resources used by RDMA. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
Add the new functions bnxt_alloc_ctx_pg_tbls()/bnxt_free_ctx_pg_tbls() to allocate and free pages for context memory. The new functions will handle the different levels of paging support and allocate/free the pages accordingly using the existing functions. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
To support level 2 context page memory structures, enhance the bnxt_ring_mem_info structure with a "depth" field to specify the page level and add a flag to specify using full pages for L1 and L2 page tables. This is needed to support RDMA functionality on 57500 chips since RDMA requires more context memory. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Venkat Duvvuru 提交于
Earlier, some of the firmware commands (ex: CFA_FLOW_*) which are processed by KONG processor were sent to the CHIMP processor from the host. This approach was taken as there was no direct message channel to KONG. CHIMP in turn used to send them to KONG. Newer firmware supports a new message channel which the host can send messages directly to the KONG processor. This patch adds support for required changes needed in the driver to support direct KONG message channel. This speeds up flow related messages sent to the firmware for CLS_FLOWER offload. Signed-off-by: NVenkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Venkat Duvvuru 提交于
These routines will be enhanced in the subsequent patch to return the 2nd firmware comm. channel's hwrm response address & sequence id respectively. Signed-off-by: NVenkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Venkat Duvvuru 提交于
In preparation for adding a 2nd communication channel to firmware. Signed-off-by: NVenkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Venkat Duvvuru 提交于
Set hwrm_intr_seq_id value to its inverted value instead of HWRM_SEQ_INVALID, when an hwrm completion of type CMPL_BASE_TYPE_HWRM_DONE is received. This will enable us to use the complete 16-bit sequence ID space. Signed-off-by: NVenkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 12月, 2018 8 次提交
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由 Michael Chan 提交于
With the current driver, the statistics reported by .ndo_get_stats64() are reset when the device goes down. Store a snapshot of the rtnl_link_stats64 before shutdown. This snapshot is added to the current counters in .ndo_get_stats64() so that the counters will not get reset when the device is down. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
Display the CoS counters as additional priority counters by looking up the priority to CoS queue mapping. If the TX extended port statistics block size returned by firmware is big enough to cover the CoS counters, then we will display the new priority counters. We call firmware to get the up-to-date pri2cos mapping to convert the CoS counters to priority counters. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
There are some minor differences when assigning VF resources on the new chips. The MSIX (NQ) resource has to be assigned and ring group is not needed on the new chips. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
bnxt_en requires same number of stat_ctxs as CP rings but RDMA requires only 1 stat_ctx. Also add a new parameter resv_stat_ctxs to better keep track of stat_ctxs reserved including resources used by RDMA. Add a stat_ctxs parameter to all the relevant resource reservation functions so we can reserve the correct number of stat_ctxs. Prior to this patch, we were not reserving the extra stat_ctx for RDMA and RDMA would not work on the new 57500 chips. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
Calling bnxt_set_max_func_stat_ctxs() to modify max stat_ctxs requested or freed by the RDMA driver is wrong. After introducing reservation of resources recently, the driver has to keep track of all stat_ctxs including the ones used by the RDMA driver. This will provide a better foundation for accurate accounting of the stat_ctxs. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vasundhara Volam 提交于
For bnxt_en driver, stat_ctxs created will always be same as cp_nr_rings. Remove extra variable that duplicates the value. Also introduce bnxt_get_avail_stat_ctxs_for_en() helper to get available stat_ctxs and bnxt_get_ulp_stat_ctxs() helper to return number of stat_ctxs used by RDMA. Signed-off-by: NVasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
The available CP rings are calculated differently on the new 57500 chips, so add this helper to do this calculation correctly. The VFs will be assigned these available CP rings. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
The PF has a pool of NQs and MSIX vectors assigned to it based on NVRAM configurations. The number of usable MSIX vectors on the PF is the minimum of the NQs and MSIX vectors. Any excess NQs without associated MSIX may be used for the VFs, so we need to store this max_nqs value. max_nqs minus the NQs used by the PF will be the available NQs for the VFs. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 12月, 2018 1 次提交
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由 Michael Chan 提交于
The new 57500 chips use 1 NQ per MSIX vector, whereas legacy chips use 1 CP ring per MSIX vector. To better unify this, add a resv_irqs field to struct bnxt_hw_resc. On legacy chips, we initialize resv_irqs with resv_cp_rings. On new chips, we initialize it with the allocated MSIX resources. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 11月, 2018 2 次提交
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由 Michael Chan 提交于
To keep track of the number of times the workaround code for 57500 A0 has been triggered. This is a per NQ counter. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michael Chan 提交于
Hardware can sometimes not generate NQ MSIX with a single pending CP ring entry. This seems to always happen at the last entry of the CP ring before it wraps. Add logic to check all the CP rings for pending entries without the CP ring consumer index advancing. Calling HWRM_DBG_RING_INFO_GET to read the context of the CP ring will flush out the NQ entry and MSIX. Signed-off-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 10月, 2018 1 次提交
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由 Dan Carpenter 提交于
The struct type was copied from the line before but it should be "tx" instead of "rx". I have reviewed the code and I can't immediately see that this bug causes a runtime issue. Fixes: 36e53349 ("bnxt_en: Add additional extended port statistics.") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NMichael Chan <michael.chan@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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