- 18 11月, 2014 2 次提交
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由 Jiang Liu 提交于
Introduce functions to support dynamic IOMMU seq_id allocating and releasing, which will be used to support DMAR hotplug. Also rename IOMMU_UNITS_SUPPORTED as DMAR_UNITS_SUPPORTED. Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Reviewed-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Jiang Liu 提交于
Introduce helper function dmar_walk_resources to walk resource entries in DMAR table and ACPI buffer object returned by ACPI _DSM method for IOMMU hot-plug. Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 06 11月, 2014 1 次提交
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由 Li, Zhen-Hua 提交于
The function context_set_address_root() and set_root_value are setting new address in a wrong way, and this patch is trying to fix this problem. According to Intel Vt-d specs(Feb 2011, Revision 1.3), Chapter 9.1 and 9.2, field ctp in root entry is using bits 12:63, field asr in context entry is using bits 12:63. To set these fields, the following functions are used: static inline void context_set_address_root(struct context_entry *context, unsigned long value); and static inline void set_root_value(struct root_entry *root, unsigned long value) But they are using an invalid method to set these fields, in current code, only a '|' operator is used to set it. This will not set the asr to the expected value if it has an old value. For example: Before calling this function, context->lo = 0x3456789012111; value = 0x123456789abcef12; After we call context_set_address_root(context, value), expected result is context->lo == 0x123456789abce111; But the actual result is: context->lo == 0x1237577f9bbde111; So we need to clear bits 12:63 before setting the new value, this will fix this problem. Signed-off-by: NLi, Zhen-Hua <zhen-hual@hp.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 02 10月, 2014 3 次提交
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由 Joerg Roedel 提交于
The VT-d specification states that an RMRR entry in the DMAR table needs to specify the full path to the device. This is also how newer Linux kernels implement it. Unfortunatly older drivers just match for the target device and not the full path to the device, so that BIOS vendors implement that behavior into their BIOSes to make them work with older Linux kernels. But those RMRR entries break on newer Linux kernels. Work around this issue by adding a fall-back into the RMRR matching code to match those old RMRR entries too. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
This will be used later to match broken RMRR entries. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
This makes sure any RMRR mappings stay in place when the driver is unbound from the device. Signed-off-by: NJoerg Roedel <jroedel@suse.de> Tested-by: NJerry Hoemann <jerry.hoemann@hp.com>
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- 26 9月, 2014 2 次提交
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由 Joerg Roedel 提交于
When the device id for an IOAPIC is overridden on the kernel command line, the iommu driver has to make sure it sets up a DTE for this device id. Reported-by: NSu Friendy <friendy.su@sony.com.cn> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yijing Wang 提交于
Commit 71054d88 ("x86, hpet: Introduce x86_msi_ops.setup_hpet_msi") introduced x86_msi_ops.setup_hpet_msi to setup hpet MSI irq when irq remapping enabled. This caused a regression of hpet MSI irq remapping. Original code flow before commit 71054d88: hpet_setup_msi_irq() arch_setup_hpet_msi() setup_hpet_msi_remapped() remap_ops->setup_hpet_msi() alloc_irte() msi_compose_msg() hpet_msi_write() ... Current code flow after commit 71054d88: hpet_setup_msi_irq() x86_msi.setup_hpet_msi() setup_hpet_msi_remapped() intel_setup_hpet_msi() alloc_irte() Currently, we only call alloc_irte() for hpet MSI, but do not composed and wrote its msg... Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 25 9月, 2014 15 次提交
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由 Mark Salter 提交于
iommu_bus_init() registers a bus notifier on the given bus by using a statically defined notifier block: static struct notifier_block iommu_bus_nb = { .notifier_call = iommu_bus_notifier, }; This same notifier block is used for all busses. This causes a problem for notifiers registered after iommu has registered this callback on multiple busses. The problem is that a subsequent notifier being registered on a bus which has this iommu notifier will also get linked in to the notifier list of all other busses which have this iommu notifier. This patch fixes this by allocating the notifier_block at runtime. Some error checking is also added to catch any allocation failure or notifier registration error. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Alex Williamson 提交于
For a PCI device, aliases from the IVRS table won't be populated into dma_alias_devfn until after iommu_init_device() is called on each device. We therefore want to split init_iommu_group() to be called from a separate loop immediately following. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Cc: stable@vger.kernel.org # 3.17 Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Alex Williamson 提交于
It turns out that our assumption that aliases are always to the same slot isn't true. One particular platform reports an IVRS alias of the SATA controller (00:11.0) for the legacy IDE controller (00:14.1). When we hit this, we attempt to use a single IOMMU group for everything on the same bus, which in this case is the root complex. We already have multiple groups defined for the root complex by this point, resulting in multiple WARN_ON hits. This patch makes these sorts of aliases work again with IOMMU groups by reworking how we search through the PCI address space to find existing groups. This should also now handle looped dependencies and all sorts of crazy inter-dependencies that we'll likely never see. The recursion used here should never be very deep. It's unlikely to have individual aliases and only theoretical that we'd ever see a chain where one alias causes us to search through to yet another alias. We're also only dealing with PCIe device on a single bus, which means we'll typically only see multiple slots in use on the root complex. Loops are also a theoretically possibility, which I've tested using fake DMA alias quirks and prevent from causing problems using a bitmap of the devfn space that's been visited. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Cc: stable@vger.kernel.org # 3.17 Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Kiran Padwal 提交于
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: NKiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Maurizio Lombardi 提交于
under low memory conditions, alloc_pte() may return a NULL pointer. iommu_map_page() does not check it and will panic the system. Signed-off-by: NMaurizio Lombardi <mlombard@redhat.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Laurent Pinchart 提交于
The owner field is never set. Remove it. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Cc: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
This function will replace the current iommu_domain_has_cap function and clean up the interface while at it. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Allow compile-time type-checking. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 24 9月, 2014 1 次提交
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由 Andres Lagar-Cavilla 提交于
1. We were calling clear_flush_young_notify in unmap_one, but we are within an mmu notifier invalidate range scope. The spte exists no more (due to range_start) and the accessed bit info has already been propagated (due to kvm_pfn_set_accessed). Simply call clear_flush_young. 2. We clear_flush_young on a primary MMU PMD, but this may be mapped as a collection of PTEs by the secondary MMU (e.g. during log-dirty). This required expanding the interface of the clear_flush_young mmu notifier, so a lot of code has been trivially touched. 3. In the absence of shadow_accessed_mask (e.g. EPT A bit), we emulate the access bit by blowing the spte. This requires proper synchronizing with MMU notifier consumers, like every other removal of spte's does. Signed-off-by: NAndres Lagar-Cavilla <andreslc@google.com> Acked-by: NRik van Riel <riel@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 22 9月, 2014 1 次提交
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由 Mitchel Humpherys 提交于
We are using the same pfn for every pte we create while constructing the pmd. Fix this by actually updating the pfn on each iteration of the pmd construction loop. It's not clear if we can actually hit this bug right now since iommu_map splits up the calls to .map based on the page size, so we only ever seem to iterate this loop once. However, things might change in the future that might cause us to hit this. Signed-off-by: NMitchel Humpherys <mitchelh@codeaurora.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 17 9月, 2014 7 次提交
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由 Robin Murphy 提交于
MMU-401 is similar to MMU-400, but updated with limited ARMv8 support. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Robin Murphy 提交于
The SMMU driver was relying on a quirk of MMU-500 r2px to identify the correct architecture version. Since this does not apply to other implementations, make the architecture version for each supported implementation explicit. While we're at it, remove the unnecessary #ifdef since the dependencies for CONFIG_ARM_SMMU already imply CONFIG_OF. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
In order for nested translation to work correctly, we need to ensure that the maximum output address size from stage-1 is <= the maximum supported input address size to stage-2. The latter is currently defined by VA_BITS, since we make use of the CPU page table functions for allocating out tables and so the driver currently enforces this restriction by truncating the stage-1 output size during probe. In reality, this doesn't make a lot of sense; the guest OS is responsible for managing the stage-1 page tables, so we actually just need to ensure that the ID registers of the virtual SMMU interface only advertise the supported stage-2 input size. This patch fixes the problem by treating the stage-1 and stage-2 input address sizes separately. Reported-by: NTirumalesh Chalamarla <tchalamarla@cavium.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
Arbitrary integer division is not available in all ARM CPUs, so the GCC may spit out calls to helper functions which are not implemented in the kernel. This patch avoids these problems in the SMMU driver by using page shift instead of page size, so that divisions by the page size (as required by the vSMMU code) can be expressed as a simple right shift. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
In preparation for nested translation support, stick a pointer to the iommu_domain in dev->archdata.iommu. This makes it much easier to grab hold of the physical group configuration (e.g. cbndx) when dealing with vSMMU accesses from a guest. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
Whilst the driver currently creates one IOMMU group per device, this will soon change when we start supporting non-transparent PCI bridges which require all upstream masters to be assigned to the same address space. This patch reworks our IOMMU group code so that we can easily support multi-master groups. The master configuration (streamids and smrs) is stored as private iommudata on the group, whilst the low-level attach/detach code is updated to avoid double alloc/free when dealing with multiple masters sharing the same SMMU configuration. This unifies device handling, regardless of whether the device sits on the platform or pci bus. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
When debugging and testing code on an SMMU that supports nested translation, it can be useful to restrict the driver to a particular stage of translation. This patch adds a module parameter to the ARM SMMU driver to allow this by restricting the ability of the probe() code to detect support for only the specified stage. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 05 9月, 2014 3 次提交
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由 Varun Sethi 提交于
iommu_group_get_for_dev determines the iommu group for the PCI device and adds the device to the group. In the PAMU driver we were again adding the device to the same group without checking if the device already had an iommu group. This resulted in the following warning. sysfs: cannot create duplicate filename '/devices/ffe200000.pcie/pci0000:00/0000:00:00.0/iommu_group' ------------[ cut here ]------------ WARNING: at fs/sysfs/dir.c:31 Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc3-00002-g7505ceaf-dirty #126 task: c0000001fe0a0000 ti: c0000001fe044000 task.ti: c0000001fe044000 NIP: c00000000018879c LR: c000000000188798 CTR: c00000000001ea50 REGS: c0000001fe047040 TRAP: 0700 Not tainted (3.17.0-rc3-00002-g7505ceaf-dirty) MSR: 0000000080029000 <CE,EE,ME> CR: 24ad8e22 XER: 20000000 SOFTE: 1 GPR00: c000000000188798 c0000001fe0472c0 c0000000009a52e0 0000000000000065 GPR04: 0000000000000001 0000000000000000 3a30303a00000000 0000000027000000 GPR08: 2f696f6d00000000 c0000000008d3830 c0000000009b3938 c0000000009bb3d0 GPR12: 0000000028ad8e24 c00000000fff4000 c00000000000205c 0000000000000000 GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR20: 0000000000000000 0000000000000000 0000000000000000 c0000000008a4c70 GPR24: c0000000007e9010 c0000001fe0140a8 ffffffffffffffef 0000000000000001 GPR28: c0000001fe22ebb8 c0000000007e9010 c00000000090bf10 c0000001fe220000 NIP [c00000000018879c] .sysfs_warn_dup+0x74/0xa4 LR [c000000000188798] .sysfs_warn_dup+0x70/0xa4 Call Trace: [c0000001fe0472c0] [c000000000188798] .sysfs_warn_dup+0x70/0xa4 (unreliable) [c0000001fe047350] [c000000000188d34] .sysfs_do_create_link_sd.clone.2+0x168/0x174 [c0000001fe047400] [c0000000004b3cf8] .iommu_group_add_device+0x78/0x244 [c0000001fe0474b0] [c0000000004b6964] .fsl_pamu_add_device+0x88/0x1a8 [c0000001fe047570] [c0000000004b3960] .iommu_bus_notifier+0xdc/0x15c [c0000001fe047600] [c000000000059848] .notifier_call_chain+0x8c/0xe8 [c0000001fe0476a0] [c000000000059d04] .__blocking_notifier_call_chain+0x58/0x84 [c0000001fe047750] [c00000000036619c] .device_add+0x464/0x5c8 [c0000001fe047820] [c000000000300ebc] .pci_device_add+0x14c/0x17c [c0000001fe0478c0] [c000000000300fbc] .pci_scan_single_device+0xd0/0xf4 [c0000001fe047970] [c00000000030104c] .pci_scan_slot+0x6c/0x18c [c0000001fe047a10] [c00000000030226c] .pci_scan_child_bus+0x40/0x114 [c0000001fe047ac0] [c000000000021974] .pcibios_scan_phb+0x240/0x2c8 [c0000001fe047b70] [c00000000085a970] .pcibios_init+0x64/0xc8 [c0000001fe047c00] [c000000000001884] .do_one_initcall+0xbc/0x224 [c0000001fe047d00] [c000000000852d50] .kernel_init_freeable+0x14c/0x21c [c0000001fe047db0] [c000000000002078] .kernel_init+0x1c/0xfa4 [c0000001fe047e30] [c000000000000884] .ret_from_kernel_thread+0x58/0xd4 Instruction dump: 7c7f1b79 4182001c 7fe4fb78 7f83e378 38a01000 4bffc905 60000000 7c641b78 e87e8008 7fa5eb78 48482ff5 60000000 <0fe00000> 7fe3fb78 4bf7bd39 60000000 Signed-off-by: NVarun Sethi <Varun.Sethi@freescale.com> Cc: stable@vger.kernel.org Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Suman Anna 提交于
A device is tied to an iommu through its archdata field. The archdata is allocated on the fly for DT-based devices automatically through the .add_device iommu ops. The current logic incorrectly assigned the name of the IOMMU user device, instead of the name of the IOMMU device as required by the attach logic. Fix this issue so that DT-based devices can attach successfully to an IOMMU domain. Signed-off-by: NSuman Anna <s-anna@ti.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Suman Anna 提交于
Any device requiring to be attached to an iommu_domain must have valid archdata containing the necessary iommu information, which is SoC-specific. Add a check in the omap_iommu_attach_dev to make sure that the device has valid archdata before accessing different SoC-specific fields of the archdata. This prevents a NULL pointer dereference on any misconfigured devices. Signed-off-by: NSuman Anna <s-anna@ti.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 02 9月, 2014 4 次提交
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由 Will Deacon 提交于
Working out the usable address sizes for the SMMU is surprisingly tricky. We must take into account both the limitations of the hardware for VA, IPA and PA sizes but also any restrictions imposed by the Linux page table code, particularly when dealing with nested translation (where the IPA size is limited by the input address size at stage-2). This patch fixes a few corner cases in our address size handling so that we correctly deal with 40-bit addresses in TTBCR2 and restrict the IPA size differently depending on whether or not we have support for nested translation. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Hans Wennborg 提交于
The prefix suggests the number should be printed in hex, so use the %x specifier to do that. Found by using regex suggested by Joe Perches. Signed-off-by: NHans Wennborg <hans@hanshq.net> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Olav Haugan 提交于
The number of S2CR registers is not properly set when stream matching is not supported. Fix this and add check that we do not try to access outside of the number of S2CR regisrers. Signed-off-by: NOlav Haugan <ohaugan@codeaurora.org> [will: added missing NUMSIDB_* definitions] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
When we attach a device to a domain, we configure the SMRs (if we have any) to match the Stream IDs for the corresponding SMMU master and program the s2crs accordingly. However, on detach we tear down the s2crs assuming stream-indexing (as opposed to stream-matching) and SMRs assuming they are present. This patch fixes the device detach code so that it operates as a converse of the attach code. Cc: <stable@vger.kernel.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 01 9月, 2014 1 次提交
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由 Vladimir Murzin 提交于
If split page table lock for PTE tables is enabled (CONFIG_SPLIT_PTLOCK_CPUS <=NR_CPUS) pgtable_page_ctor() leads to non-atomic allocation for ptlock with a spinlock held, resulting in: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 466 at kernel/locking/lockdep.c:2742 lockdep_trace_alloc+0xd8/0xf4() DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags)) Modules linked in: CPU: 0 PID: 466 Comm: dma0chan0-copy0 Not tainted 3.16.0-3d47efb-clean-pl330-dma_test-ve-a15-a32-slr-m c-on-3+ #55 [<80014748>] (unwind_backtrace) from [<80011640>] (show_stack+0x10/0x14) [<80011640>] (show_stack) from [<802bf864>] (dump_stack+0x80/0xb4) [<802bf864>] (dump_stack) from [<8002385c>] (warn_slowpath_common+0x64/0x88) [<8002385c>] (warn_slowpath_common) from [<80023914>] (warn_slowpath_fmt+0x30/0x40) [<80023914>] (warn_slowpath_fmt) from [<8005d818>] (lockdep_trace_alloc+0xd8/0xf4) [<8005d818>] (lockdep_trace_alloc) from [<800d3d78>] (kmem_cache_alloc+0x24/0x144) [<800d3d78>] (kmem_cache_alloc) from [<800bfae4>] (ptlock_alloc+0x18/0x2c) [<800bfae4>] (ptlock_alloc) from [<802b1ec0>] (arm_smmu_handle_mapping+0x4c0/0x690) [<802b1ec0>] (arm_smmu_handle_mapping) from [<802b0cd8>] (iommu_map+0xe0/0x148) [<802b0cd8>] (iommu_map) from [<80019098>] (arm_coherent_iommu_map_page+0x160/0x278) [<80019098>] (arm_coherent_iommu_map_page) from [<801f4d78>] (dmatest_func+0x60c/0x1098) [<801f4d78>] (dmatest_func) from [<8003f8ac>] (kthread+0xcc/0xe8) [<8003f8ac>] (kthread) from [<8000e868>] (ret_from_fork+0x14/0x2c) ---[ end trace ce0d27e6f434acf8 ]-- Split page tables lock is not used in the driver. In fact, page tables are guarded with domain lock, so remove calls to pgtable_page_{c,d}tor(). Cc: <stable@vger.kernel.org> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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