- 18 2月, 2020 1 次提交
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由 Andy Shevchenko 提交于
Since PCI core provides a generic PCI_DEVICE_DATA() macro, replace STMMAC_DEVICE() with former one. No functional change intended. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2020 6 次提交
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由 Voon Weifeng 提交于
The recent patch to support passive mode converter did not take care the phy interface configuration in PCI platform data. Hence, converting all the PCI platform data from plat->interface to plat->phy_interface as the default mode is meant for PHY. Fixes: 0060c878 ("net: stmmac: implement support for passive mode converters via dt") Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Tested-by: NTan, Tee Min <tee.min.tan@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tan, Tee Min 提交于
Without checking for IFF_MULTICAST flag, it is wrong to assume multicast filtering is always enabled. By checking against IFF_MULTICAST, now the driver behaves correctly when the multicast support is toggled by below command:- ip link set <devname> multicast off|on Fixes: 0efedbf1 ("net: stmmac: xgmac: Fix XGMAC selftests") Signed-off-by: NTan, Tee Min <tee.min.tan@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Verma, Aashish 提交于
Without checking for IFF_MULTICAST flag, it is wrong to assume multicast filtering is always enabled. By checking against IFF_MULTICAST, now the driver behaves correctly when the multicast support is toggled by below command:- ip link set <devname> multicast off|on Fixes: 477286b5 ("stmmac: add GMAC4 core support") Signed-off-by: NVerma, Aashish <aashishx.verma@intel.com> Tested-by: NTan, Tee Min <tee.min.tan@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ong Boon Leong 提交于
We should always do a read of current value of XGMAC_VLAN_TAG instead of directly overwriting the register value. Fixes: 3cd1cfcb ("net: stmmac: Implement VLAN Hash Filtering in XGMAC") Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tan, Tee Min 提交于
It should always do a read of current value of GMAC_VLAN_TAG instead of directly overwriting the register value. Fixes: c1be0022 ("net: stmmac: Add VLAN HASH filtering support in GMAC4+") Signed-off-by: NTan, Tee Min <tee.min.tan@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dejin Zheng 提交于
It forgot to reduce the value of the variable retry in a while loop in the ethqos_configure() function. It may cause an endless loop and without timeout. Fixes: a7c30e62 ("net: stmmac: Add driver for Qualcomm ethqos") Signed-off-by: NDejin Zheng <zhengdejin5@gmail.com> Acked-by: NVinod Koul <vkoul@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 2月, 2020 1 次提交
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由 Nicolin Chen 提交于
When running v5.5 with a rootfs on NFS, memory abort may happen in the system resume stage: Unable to handle kernel paging request at virtual address dead00000000012a [dead00000000012a] address between user and kernel address ranges pc : run_timer_softirq+0x334/0x3d8 lr : run_timer_softirq+0x244/0x3d8 x1 : ffff800011cafe80 x0 : dead000000000122 Call trace: run_timer_softirq+0x334/0x3d8 efi_header_end+0x114/0x234 irq_exit+0xd0/0xd8 __handle_domain_irq+0x60/0xb0 gic_handle_irq+0x58/0xa8 el1_irq+0xb8/0x180 arch_cpu_idle+0x10/0x18 do_idle+0x1d8/0x2b0 cpu_startup_entry+0x24/0x40 secondary_start_kernel+0x1b4/0x208 Code: f9000693 a9400660 f9000020 b4000040 (f9000401) ---[ end trace bb83ceeb4c482071 ]--- Kernel panic - not syncing: Fatal exception in interrupt SMP: stopping secondary CPUs SMP: failed to stop secondary CPUs 2-3 Kernel Offset: disabled CPU features: 0x00002,2300aa30 Memory Limit: none ---[ end Kernel panic - not syncing: Fatal exception in interrupt ]--- It's found that stmmac_xmit() and stmmac_resume() sometimes might run concurrently, possibly resulting in a race condition between mod_timer() and setup_timer(), being called by stmmac_xmit() and stmmac_resume() respectively. Since the resume() runs setup_timer() every time, it'd be safer to have del_timer_sync() in the suspend() as the counterpart. Signed-off-by: NNicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 25 1月, 2020 1 次提交
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由 Ajay Gupta 提交于
Use generic device API to get phy mode to fix probe failure with ACPI based devices. Signed-off-by: NAjay Gupta <ajayg@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 1月, 2020 1 次提交
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由 Dejin Zheng 提交于
snps databook noted that physical coding sublayer (PCS) interface that can be used when the MAC is configured for the TBI, RTBI, or SGMII PHY interface. we have RGMII and SGMII in a SoC and it also has the PCS block. it needs stmmac_init_phy and stmmac_mdio_register function for initializing phy when it used RGMII interface. Signed-off-by: NDejin Zheng <zhengdejin5@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 1月, 2020 3 次提交
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由 Jose Abreu 提交于
When HW does not support perfect filtering the feature will not be enabled in the net_device. Add a check for this to prevent failures. Fixes: 1b2250a0 ("net: stmmac: selftests: Add tests for VLAN Perfect Filtering") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
When the VLAN ID does not match the expected one it means filter failed in HW. Fix it. Fixes: 94e18382 ("net: stmmac: selftests: Add selftest for VLAN TX Offload") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Synopsys AXS101 boards do not support unaligned memory loads or stores. Change the selftests mechanism to explicity: - Not add extra alignment in TX SKB - Use the unaligned version of ether_addr_equal() Fixes: 091810db ("net: stmmac: Introduce selftests support") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2020 8 次提交
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由 Jose Abreu 提交于
Add a new test for TBS feature which is used in ETF scheduler. In this test, we send a packet with a launch time specified as now + 500ms and check if the packet was transmitted on that time frame. Changes from v2: - Use the TBS bitfield - Remove debug message Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
In the upcoming commit for TBS selftest we will need to send a packet on a specific Queue. As stmmac fallsback to netdev_pick_tx() on the select Queue callback, we need to switch all selftests logic to dev_direct_xmit() so that we can send the given SKB on a specific Queue. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Adds more information regarding HW Capabilities in the corresponding DebugFS file. Changes from v2: - Remove the TX/RX queues in use (Jakub) Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Enable TBS support on GMAC5 PCI entry for all Queues except Queue 0. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Adds all the necessary HW hooks to support TBS feature in QoS cores. Changes from v1: - Remove unneeded LT shift as the IP already does this. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Adds all the necessary HW hooks to support TBS feature in XGMAC cores. Changes from v1: - Remove unneeded LT shift as the IP already does this. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Adds the support for ETF scheduler using TBS feature which is available in XGMAC and QoS IPs. Changes from v2: - Fix checkpatch issues (Jakub) - Use the TBS bitfield Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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由 Jose Abreu 提交于
Adds the initial hooks for TBS support. This needs a 32 byte descriptor in order for it to work with current HW. Adds all the logic for Enhanced Descriptors in main core but no HW related logic for now. Changes from v2: - Use bitfield for TBS status / support (Jakub) - Remove unneeded cache alignment (Jakub) - Fix checkpatch issues Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 11 1月, 2020 4 次提交
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由 Jose Abreu 提交于
RSS, when enabled, will bypass the L3 and L4 filtering causing it not to work. Add a check before trying to setup the filters. Fixes: 425eabdd ("net: stmmac: Implement L3/L4 Filters using TC Flower") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
We are disabling RSS on HW but not updating the internal private status to the 'disabled' state. This is needed for next tc commit that will check if RSS is disabled before trying to apply filters. Fixes: 4647e021 ("net: stmmac: selftests: Add selftest for L3/L4 Filters") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
If FPE is supposed to be disabled we need to return after disabling it. Fixes: 7c728274 ("net: stmmac: gmac5+: Add support for Frame Preemption") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
If FPE is supposed to be disabled we need to return after disabling it. Fixes: f0e56c8d ("net: stmmac: xgmac3+: Add support for Frame Preemption") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 1月, 2020 1 次提交
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由 Dejin Zheng 提交于
All members of mdio_bus_data are cleared to 0 when it was obtained by devm_kzalloc(). so It doesn't need to set phy_mask as 0 again. Signed-off-by: NDejin Zheng <zhengdejin5@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 1月, 2020 2 次提交
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由 Chen-Yu Tsai 提交于
Allow all the RGMII modes to be used. This would allow us to represent the hardware better in the device tree with RGMII_ID where in most cases the PHY's internal delay for both RX and TX are used. Fixes: 9f93ac8d ("net-next: stmmac: Add dwmac-sun8i") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Chen-Yu Tsai 提交于
Allow all the RGMII modes to be used. This would allow us to represent the hardware better in the device tree with RGMII_ID where in most cases the PHY's internal delay for both RX and TX are used. Fixes: af0bd4e9 ("net: stmmac: sunxi platform extensions for GMAC in Allwinner A20 SoC's") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 1月, 2020 2 次提交
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由 Jose Abreu 提交于
When using fixed link we don't need the MDIO bus support. Reported-by: NHeiko Stuebner <heiko@sntech.de> Reported-by: Nkernelci.org bot <bot@kernelci.org> Fixes: d3e014ec ("net: stmmac: platform: Fix MDIO init for platforms without PHY") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Acked-by: NSriram Dash <Sriram.dash@samsung.com> Tested-by: NPatrice Chotard <patrice.chotard@st.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail> # Lamobo R1 (fixed-link + MDIO sub node for roboswitch). Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jiping Ma 提交于
Add one notifier for udev changes net device name. Fixes: b6601323ef9e ("net: stmmac: debugfs entry name is not be changed when udev rename") Signed-off-by: NJiping Ma <jiping.ma2@windriver.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 12月, 2019 1 次提交
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由 Martin Blumenstingl 提交于
GXBB and newer SoCs use the fixed FCLK_DIV2 (1GHz) clock as input for the m250_sel clock. Meson8b and Meson8m2 use MPLL2 instead, whose rate can be adjusted at runtime. So far we have been running MPLL2 with ~250MHz (and the internal m250_div with value 1), which worked enough that we could transfer data with an TX delay of 4ns. Unfortunately there is high packet loss with an RGMII PHY when transferring data (receiving data works fine though). Odroid-C1's u-boot is running with a TX delay of only 2ns as well as the internal m250_div set to 2 - no lost (TX) packets can be observed with that setting in u-boot. Manual testing has shown that the TX packet loss goes away when using the following settings in Linux (the vendor kernel uses the same settings): - MPLL2 clock set to ~500MHz - m250_div set to 2 - TX delay set to 2ns on the MAC side Update the m250_div divider settings to only accept dividers greater or equal 2 to fix the TX delay generated by the MAC. iperf3 results before the change: [ ID] Interval Transfer Bitrate Retr [ 5] 0.00-10.00 sec 182 MBytes 153 Mbits/sec 514 sender [ 5] 0.00-10.00 sec 182 MBytes 152 Mbits/sec receiver iperf3 results after the change (including an updated TX delay of 2ns): [ ID] Interval Transfer Bitrate Retr Cwnd [ 5] 0.00-10.00 sec 927 MBytes 778 Mbits/sec 0 sender [ 5] 0.00-10.01 sec 927 MBytes 777 Mbits/sec receiver Fixes: 4f6a71b8 ("net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 12月, 2019 1 次提交
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由 Padmanabhan Rajanbabu 提交于
The current implementation of "stmmac_dt_phy" function initializes the MDIO platform bus data, even in the absence of PHY. This fix will skip MDIO initialization if there is no PHY present. Fixes: 74371272 ("net: stmmac: Convert to phylink and remove phylib logic") Acked-by: NJayati Sahu <jayati.sahu@samsung.com> Signed-off-by: NSriram Dash <sriram.dash@samsung.com> Signed-off-by: NPadmanabhan Rajanbabu <p.rajanbabu@samsung.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 12月, 2019 8 次提交
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由 Jose Abreu 提交于
For ARCHs that don't support 64 bits division we need to use the helpers. Fixes: b60189e0 ("net: stmmac: Integrate EST with TAPRIO scheduler API") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
This can be useful for debug. Add these counters on GMAC5+ cores just like we did for XGMAC. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Adds the HW specific support for Frame Preemption on XGMAC3+ cores. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Adds the HW specific support for Frame Preemption on GMAC5+ cores. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Adds the support for Frame Preemption using TAPRIO API. This works along with EST feature and allows to select if preemptable traffic shall be sent during specific queues opening time. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Now that we have the EST code for XGMAC and QoS we can use it with the TAPRIO scheduler. Integrate it into the main driver and use the API to configure the EST feature. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Adds the support for EST in XGMAC cores. This feature allows to offload scheduling of queues opening time to the IP. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Adds the support for EST in GMAC5+ cores. This feature allows to offload scheduling of queues opening time to the IP. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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