This updates the ppc iommu/pci dma mappers to sg chaining. Includes
further fixes from FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>.
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Acked-by: NGeoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

This updates the ia64 iommu/pci dma mappers to sg chaining.
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Acked-by: NMuli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Acked-by: NMuli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

This option is true if a low-level driver can support sg
chaining. This will be removed eventually when all the drivers are
converted to support sg chaining. q->max_phys_segments is set to
SCSI_MAX_SG_SEGMENTS if false.
Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Atari keyboard: incorporate additional review comments:
  o Kill reference to source file name
  o Return error value from input_register_device() instead of -ENOMEM
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Michael Schmitz <schmitz@biophys.uni-duesseldorf.de>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add new prom.h for AU1x00.
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Update AU1000 get_ethernet_addr().
Three functions were brought together in one.
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

msic_dcr_read() doesn't really do anything useful, just replace it with
direct calls to dcr_read().
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

With the base stored in dcr_host_t, there's no need for callers to pass
the dcr_n into dcr_unmap(). In fact this removes the possibility of them
passing the incorrect value, which would then be iounmap()'ed.
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we
can save them the trouble and do it in dcr_read()/dcr_write().

As some background to why we just went through all this jiggery-pokery,
benh sayeth:

 Initially the goal of the dcr_read/dcr_write routines was to operate like
 mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx
 hardware, indirect DCR access is a pain (goes through a table of
 instructions) and it's useful to have the compiler resolve an absolute DCR
 inline.

 We decided that wasn't worth the API bastardisation since most places
 where absolute DCR values are used are low level 4xx-only code which may
 as well continue using mfdcr/mtdcr, while the new API is designed for
 device "instances" that can exist on 4xx and Axon type platforms and may
 be located at variable DCR offsets.
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

This patch provides driver for ITE 8152 PCI bridge.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch provides core support for CM-X270 platform.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

pxa_gpio_mode() is a universal call that fiddles with the GAFR
(gpio alternate function register.)  GAFR does not exist on PXA3
CPUs, but instead the alternate functions are controlled via the
MFP support code.

Platforms are expected to configure the MFP according to their
needs in their platform support code rather than drivers.  We
extend this idea to the GAFR, and make the gpio_direction_*()
functions purely operate on the GPIO level.

This means platform support code is entirely responsible for
configuring the GPIOs alternate functions on all PXA CPU types.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Neric miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update defonfig file for sn2 to match recent changes in config options.
Signed-off-by: NJes Sorensen <jes@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Kill unused variables
Signed-off-by: NGeert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

sched.o gets smaller and faster if we compile it with -fomit-frame-pointers,
so make this a config option. The cost is the loss of multi-depth wchan
lookups - but SysRq-T is a sufficient replacement for them anyway, so their
utility is much lower these days.

the size difference is significant:

   text    data     bss     dec     hex filename
  34005    3462      24   37491    9273 sched.o.before
  33470    3462      24   36956    905c sched.o.after
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: NMike Galbraith <efault@gmx.de>
Reviewed-by: NThomas Gleixner <tglx@linutronix.de>

The 64bit SMP bootup is slightly different to the 32bit one. It enables
the boot CPU local APIC timer before all CPUs are brought up. Some AMD C1E
systems have the C1E feature flag only set in the secondary CPU. Due to
the early enable of the boot CPU local APIC timer the APIC timer is
registered as a fully functional device. When we detect the wreckage during
the bringup of the secondary CPU, we need to force the boot CPU into
broadcast mode. 

Check the C1E caused APIC timer disable, when the secondary APIC timer is
initialized. If the boot CPU APIC timer was registered as a functional
clock event device, then fix this up and utilize the
CLOCK_EVT_NOTIFY_BROADCAST_FORCE mechanism to force the already
registered boot CPU APIC timer into broadcast mode.

Tested by force injecting the failure mode.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Preparatory patch for the AMD C1E wreckage fixup.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

 > Maybe I just picked a bad time to try, but...
 > 
 > arch/x86/kernel/alternative.c: In function 'apply_alternatives':
 > arch/x86/kernel/alternative.c:191: error: 'VSYSCALL_START' undeclared (first use in this function)
 > arch/x86/kernel/alternative.c:191: error: (Each undeclared identifier is reported only once
 > arch/x86/kernel/alternative.c:191: error: for each function it appears in.)
 > arch/x86/kernel/alternative.c:191: error: 'VSYSCALL_END' undeclared (first use in this function)
 > make[1]: *** [arch/x86/kernel/alternative.o] Error 1
 > make: *** [arch/x86/kernel] Error 2

Try this.

Include missing header for vsyscall.
Signed-off-by: NDave Jones <davej@redhat.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

deal with signedness of the stuff passed to set_bit() et.al.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

There is no good reason for board platform code to mess with the ROOT_DEV.
Remove it from all in-tree platforms except powermac

This is a follow on to commit 745e1027.
The original patch had this change to lite5200.c, but it got dropped in
the psycho madness that is the 2.6.24 merge window.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

It no longer translates to "real irqs" (aka. INO buckets)
so reflect that by using a simpler name for it.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We used to need this to compute virt_irq --> ino, but that
is no longer necessary.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

All the users go through virt_irq_to_bucket() and essentially
want to go from a virt_irq to an INO, but we have a way
to do that already via virt_to_real_irq_table[].dev_ino.

This also allows us to kill both virt_to_real_irq() and
virt_irq_to_bucket().
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We have a place to stick INO information in the
virt_to_real_irq_table[], which is currently only used for VIRQs.
And that is readily accessible from the one __irq_ino() call site.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We were simply concatenating the devhandle and devino and using that
as the cookie, which defeats the entire purpose of the VIRQ hypervisor
interfaces.

Now that we use physical addresses for the INO buckets, we can
allocate them dynamically for VIRQs and encode the cookies as
~__pa(bucket).  This allows us to test for and decode the cookie with
a simple:

	brlz	$reg1, 1f
	 xnor	$reg1, %g0, $reg2

sequence.

This works because bit 64 is never set in traditional
INO vectors, and it is also never set in a physical
address.  So xnor'ing the physical address of the bucket
always gives us a negative number, and thus a unique
condition we can test cheaply.

Inspired by ideas from Greg Onufer.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Shrinks kernel by 16K compared to before the IVEC physical
address changes.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Currently we chain IVEC entries using 32-bit "pointers"
because we know that the ivector_table is in the main
kernel image, thus below 4GB.

This uses proper 64-bit pointers instead.

Whilst this bloats up the kernel image size, this sets
the infrastructure necessary to significantly shrink the
kernel size by using physical addresses and dynamically
allocating the ivector table.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Some typos led to using %i6/%i7 instead of %l6/%l7 in loads which is
really really bad because those are the frame pointer and return PC.

Based upon a raid5 crash report by Bertrand Joel.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

It is totally unnecessary as the needed information is properly
encoded in the resources.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>