- 22 6月, 2011 1 次提交
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由 Timur Tabi 提交于
On the Freescale P1022DS reference board, the SSI audio controller is connected in "asynchronous" mode to the codec's clocks, so the device tree needs an "fsl,ssi-asynchronous" property. Also remove the clock-frequency property from the wm8776 node, because the clock is enabled only if U-Boot enables it, and U-Boot will set the property if the clock is enabled. A future version of the P1022DS audio driver will configure the clock itself, but for now, the driver should not be told that the clock is running when it isn't. Also fix the FIFO depth to 15, instead of 16. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 09 6月, 2011 1 次提交
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由 Wolfram Sang 提交于
dtc was moved and .gitignores have been added to the new location. So, we can delete the old, forgotten ones. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 26 5月, 2011 1 次提交
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由 Rupjyoti Sarmah 提交于
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex. Signed-off-by: NRupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: NTirumala R Marri <tmarri@apm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 5月, 2011 1 次提交
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由 Richard Cochran 提交于
The eTSEC includes a PTP clock with quite a few features. This patch adds support for the basic clock adjustment functions, plus two external time stamps, one alarm, and the PPS callback. Signed-off-by: NRichard Cochran <richard.cochran@omicron.at> Acked-by: NDavid S. Miller <davem@davemloft.net> Acked-by: NJohn Stultz <john.stultz@linaro.org> Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 19 5月, 2011 7 次提交
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由 Prabhakar Kushwaha 提交于
Create the dts files for each core and splits the devices between the two cores for P1020RDB. Core0 has core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. Core1 has l2, eth0, crypto. MPIC is shared between two cores but each core will protect its interrupts from other core by using "protected-sources" of mpic. Fix compatible property for global-util node of P1020si.dtsi. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
PCIe device in legacy mode can trigger interrupts using the wires #INTA, #INTB ,#INTC and #INTD. PCI devices are obligated to use #INTx for interrupts under legacy mode. Each PCI slot or device is typically wired to different inputs on the interrupt controller. So, Define interrupt-map and interrupt-map-mask properties for device tree to of map each PCI interrupt signal to the inputs of the interrupt controller. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
Creates P2020si.dtsi, containing information for P2020 SoC. Modifies dts files for P2020 based systems to use dtsi file. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts files for P1020 based systems to use dtsi file Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Acked-by: NGrant Likely <grant.likelY@secretlab.ca> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Scott Wood 提交于
There is no hardware interrupt 0xf7. But now we can express the timer interrupt using 4-cell interrupts. This requires converting all of the other interrupt specifiers in the tree as well. Also add the second timer group, and fix the reg property to only describe the timer registers. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Michal Marek 提交于
Signed-off-by: NMichal Marek <mmarek@suse.cz> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michal Marek 提交于
The timestamps recorded in the .gz files add no value. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NMichal Marek <mmarek@suse.cz> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 20 4月, 2011 2 次提交
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由 David Gibson 提交于
This is a first cut at making bootwrapper code which will produce a zImage compliant with the requirements set down by ePAPR. This is a very simple bootwrapper, taking the device tree blob supplied by the ePAPR boot program and passing it on to the kernel. It builds on the earlier patch to build a relocatable ET_DYN zImage to meet the other ePAPR image requirements. For good measure we have some paranoid checks which will generate warnings if some of the ePAPR entry condition guarantees are not met. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Ellerman 提交于
This patch adds code, linker script and makefile support to allow building the zImage wrapper around the kernel as a position independent executable. This results in an ET_DYN instead of an ET_EXEC ELF output file, which can be loaded at any location by the firmware and will process its own relocations to work correctly at the loaded address. This is of interest particularly since the standard ePAPR image format must be an ET_DYN (although this patch alone is not sufficient to produce a fully ePAPR compliant boot image). Note for now we don't enable building with -pie for anything. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 04 4月, 2011 1 次提交
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由 Prabhakar Kushwaha 提交于
PCIe memory address space is 1:1 mapped with u-boot. Update dts of Px020RDB i.e. P1020RDB and P2020RDB to match the address map changes in u-boot. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 27 3月, 2011 3 次提交
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由 Kim Phillips 提交于
- all the integration parameters have been captured by the binding. - the block name really uniquely identifies this hardware. Some advocate putting SoC names everywhere in case software needs to work around some chip-specific bug, but more precise SoC information already exists in SVR, and board information already exists in the top-level device tree node. Note that sometimes the SoC name is a worse identifier than the block version, as the block version can change between revisions of the same SoC. As a matter of historical reference, neither SEC versions 2.x nor 3.x (driven by talitos) ever needed CHIP references. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Acked-off-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Help clarify that the number trailing in compatible nomenclature is the version number of the device, i.e., change: "fsl,p4080-sec4.0", "fsl,sec4.0"; to: "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Steve Cornelius <sec@pobox.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
The SEC4 supercedes the SEC2.x/3.x as Freescale's Integrated Security Engine. Its programming model is incompatible with all prior versions of the SEC (talitos). The SEC4 is also known as the Cryptographic Accelerator and Assurance Module (CAAM); this driver is named caam. This initial submission does not include support for Data Path mode operation - AEAD descriptors are submitted via the job ring interface, while the Queue Interface (QI) is enabled for use by others. Only AEAD algorithms are implemented at this time, for use with IPsec. Many thanks to the Freescale STC team for their contributions to this driver. Signed-off-by: NSteve Cornelius <sec@pobox.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 15 3月, 2011 4 次提交
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由 Xulei 提交于
Update p1022 sata compatible to "fsl,p1022-sata", "fsl,pq-sata-v2". p1022ds sata controller is v2 version comparing previous FSL sata controller, for example, mpc8536. Signed-off-by: NLei Xu <B33228@freescale.com> Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Holger Brunck 提交于
The MPC852 based mgsuvd board from Keymile was initially ported, but later on not developed further. This patch removes the respective files to decrease merging conflicts and unneeded maintenance. Signed-off-by: NHolger Brunck <holger.brunck@keymile.com> Acked-by: Heiko Schocher<hs@denx.de> Cc: Vitaly Bordug <vitb@kernel.crashing.org> Cc: Marcelo Tosatti <marcelo@kvack.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Holger Brunck 提交于
The mgcoge board from keymile is now base for some other similar boards. Therefore the board specific name mgcoge was renamed to a generic name km82xx. Additionally some enhancements were made: - rework partition table in dts file - add cpm2_pio_c gpio controller in dts file - update defconfig - add pin description for SCC1 - add pin description and configuration for USB Signed-off-by: NHolger Brunck <holger.brunck@keymile.com> Acked-by: NHeiko Schocher <hs@denx.de> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Heiko Schocher <hs@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Holger Brunck 提交于
Beside the MPC 8360 based board kmeter1 other km83xx boards from keymile will follow. Therefore the board specific naming kmeter1 for functions and files were replaced with km83xx. Additionally some updates were made: - update defconfig for 2.6.38 - rework flash partitioning in dts file - add gpio controller for qe_pio_c in dts Signed-off-by: NHolger Brunck <holger.brunck@keymile.com> Acked-by: NHeiko Schocher <hs@denx.de> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Heiko Schocher <hs@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 02 2月, 2011 2 次提交
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由 Rupjyoti Sarmah 提交于
This fix is a reset for USB PHY that requires some amount of time for power to be stable on Canyonlands. Signed-off-by: NRupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Tirumala Marri 提交于
Add Synopsys Designware DTS entry for 460EX based Canyonlands board. Signed-off-by: Tirumala R Marri<tmarri@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 21 1月, 2011 1 次提交
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由 Ben Hutchings 提交于
The dts-installed variable is initialised using a wildcard path that will be expanded relative to the build directory. Use the existing variable dtstree to generate an absolute wildcard path that will work when building in a separate directory. Reported-by: NGerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Tested-by: Gerhard Pircher <gerhard_pircher@gmx.net> [against 2.6.32] Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 13 1月, 2011 2 次提交
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由 Timur Tabi 提交于
In order to prevent the fsl_dma driver from claiming the DMA channels that the P1022DS audio driver needs, the compatible properties for those nodes must say "fsl,ssi-dma-channel" instead of "fsl,eloplus-dma-channel". Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Ilya Yanok 提交于
MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18 which is different from both MPC8313 and MPC8315. Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields in the USB DR controller CONTROL register. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Tested-by: NWolfgang Denk <wd@denx.de> Acked-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 04 1月, 2011 6 次提交
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由 Grant Likely 提交于
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 John Bonesio 提交于
This patch creates mpc5200b.dtsi containing the information for the MPC5200b SoC then modifies all of the dts files for MPC5200b based systems to use mpc5200b.dtsi. Signed-off-by: NJohn Bonesio <bones@secretlab.ca> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 John Bonesio 提交于
This patch changes some incorrect compatible strings on the local plus bus node in dts files for MPC5200b based systems. Signed-off-by: NJohn Bonesio <bones@secretlab.ca> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 John Bonesio 提交于
This patch remove unused properties in dts files in preparation of refactoring the dts files for MPC5200b based boards. Signed-off-by: NJohn Bonesio <bones@secretlab.ca> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 John Bonesio 提交于
This patch renames nodes in dts fils for MPC5200b files to prepare for refactoring of these files later. When refactoring it will be easier to verify the results if the node names aren't changing at the same time. Signed-off-by: NJohn Bonesio <bones@secretlab.ca> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 30 12月, 2010 2 次提交
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由 Ilya Yanok 提交于
MPC8308 has DMA controller compatible with mpc512x_dma driver. This patch adds device-tree node to support DMA controller on MPC8308 P1M board. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Ilya Yanok 提交于
MPC8308 has DMA controller compatible with mpc512x_dma driver. This patch adds device-tree node to support DMA controller on MPC8308RDB board. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 24 12月, 2010 2 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Dirk Brandewie 提交于
Modify arch/powerpc/boot/Makefile to use dtc command in scripts/Makefile.lib Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 29 11月, 2010 2 次提交
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由 Victor Gallardo 提交于
- Add Clock Power Management (CPM) node to dts tree - Add idle-doze entry in CPM node - Add standby entry in CPM node - Add PM and SUSPEND support by default in defconfig - Remove UART2 and UART3 as they are unused, this will allow CPM to put unused-units (UART2 and UART3) to sleep. Signed-off-by: NVictor Gallardo <vgallardo@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Victor Gallardo 提交于
- Add Clock Power Management (CPM) node to dts tree - Add idle-doze entry in CPM node - Add standby entry in CPM node - Add PM and SUSPEND support by default in defconfig - Add NO_HZ and CONFIG_HIGH_RES_TIMERS support by default in defconfig Signed-off-by: NVictor Gallardo <vgallardo@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 18 11月, 2010 1 次提交
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由 Benjamin Herrenschmidt 提交于
The code is missing a fix that went into the main kernel variant (we should try to share that code again at some stage) Reported-by: NAlbert Cahalan <acahalan@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 14 10月, 2010 1 次提交
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由 Timur Tabi 提交于
The device tree for Freescale's P1022DS reference board is missing the node for the ngPIXIS FPGA. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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