Sometimes we need to specify non-probably information for sdio devices in the
devicetree, this is done through child nodes addressed by the reg property,
whereby the reg property refers to the sdio function number, see;
Documentation/devicetree/bindings/mmc/mmc.txt

This commit adds the necessary address- and size-cells properties to the mmc
controller nodes in the dtsi files, so that dts files needing such a child
node do not need to specify these themselves.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The p2wi controller has only one possible pinmux setting. Use it by
default in the dtsi, instead of having to set it in each board's dts.
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
[wens@csie.org: reformat commit title; rename p2wi pins and use as default]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Commit f77d55a3 ("serial: 8250_dw: get index of serial line from DT
aliases") made the serial driver now use the serial aliases to get the tty
number, pointing out that our aliases have been wrong all along.

Remove them from the DTSI and add custom ones in the relevant boards.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Now that we support the sun6i variant of the touchscreen controller,
add the device node to the dtsi so we can use it.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 has non-initialized architected timers, without CNTFRQ or CNTVOFF set
by the Allwinner's bootloader.

Use the new DT property for such case, and enable the arch timers.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0"
display pipelines for when u-boot has set up a pipeline to drive a LCD panel /
VGA output rather then the HDMI output.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The GIC requires some extra opaque arguments to set the IRQ type and flags.

Convert the DTs to using the common defines.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.

Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Prepare the device trees to use the C preprocessor.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add a node for the ir receiver found on the A31.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
[Maxime: Added a node label]
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add an ir_clk sub-node to the prcm node.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add pinmux settings for the ir receive pin of the A31.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add the sample and output clocks for the MMC phase support.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NChen-Yu Tsai <wens@csie.org>
Tested-by: NChen-Yu Tsai <wens@csie.org>

The clock driver has unified support for the ahb1 clock.
Unify the clock nodes so it works.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This reverts commit 338302ae.

This is one of two commits that resulted in a boot regression.

Conflicts:
	arch/arm/boot/dts/sun6i-a31.dtsi
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com

Review of the u-boot sunxi simplefb patches has led to the decision that
u-boot should not use a specific path to find the nodes as this goes contrary
to how devicetree usually works.

Instead a platform specific compatible + properties should be used for this.

The simplefb bindings have already been updated to reflect this, this patch
brings the sunxi devicetree files in line with the new binding, and the
actual u-boot implementation as it is going upstream.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Avoid the parent pll for the mod-clk for de_be0 getting disabled when non of
the other users are enabled (which can happen when none of i2c, spi and mmc
are in use).

Note for now we point directly to the parent rather then to the de_be0 mod-clk
as that is not modelled in our devicetree yet.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add a simplefb template node for u-boot to further fill and activate.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".

Update the dtsi to use the new unified apb1 clk.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

During the GPL to GPL/X11 licensing migration, the GPL notice introduced
mentionned the device trees as a library, which is not really accurate. It
began to spread by copy and paste. Fix all these library mentions to reflect
the file that it's actually just a file.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".

Update the dtsi to use the new unified apb1 clk.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The dma controller requires that the ahb1 bus clock be driven by pll6
for peripheral access to work. Previously this was done in the dma
controller driver, but was since removed as part of a series to unify
the ahb1_mux and ahb1 clock drivers, in

    14e0e283 dmaengine: sun6i: Remove obsolete clk muxing code

Unfortunately the rest of that series did not make it, leaving us with
broken dma on sun6i.

This patch reparents ahb1_mux to pll6 using the DT assigned-clocks
properties in the dma controller node.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

During the GPL to GPL/X11 licensing migration, the GPL notice introduced
mentionned the device trees as a library, which is not really accurate. It
began to spread by copy and paste. Fix all these library mentions to reflect
the file that it's actually just a file.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense our
DTSI first under a GPL/X11 dual-license. Hopefully, the DTS will follow soon.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NCarlo Caione <carlo@caione.org>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

The clock-frequency values of the i2c controller nodes match the
defaults of the driver. Remove the properties to use the defaults,
and be consistent with sun8i.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Now that we have a driver for sun6i's rtc hardware, add a device node
for it so we can use it.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

dtc was giving warnings for missing #address-cells and #size-cells for
the new sun6i-a31-hummingbird.dts, which has a i2c-based rtc device.

This patch adds the properties for all i2c controller nodes for sun6i.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Alias GMAC as ethernet0 so U-boot can fill in the MAC address.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 has the same GMAC found on the A20 SoC, except it has
an extra reset control.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The GMAC uses 1 of 2 sources for its transmit clock, depending on the
PHY interface mode. Add both sources as dummy clocks, and as parents
to the GMAC clock node.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 SoC has a GMAC gigabit ethernet controller supporting
MII, GMII, RGMII modes. Add pin muxing options for these modes.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The pinctrl device is also an interrupt controller for external
interrupts. Add the missing #interrupt-cells property.

Also remove the unused #address-cells property.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: make the same change for sun4i, sun5i and sun6i]
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The unit-address doesn't match the reg property. Since the reg property is
correct, change the unit-address accordingly.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

That will allow to use the CPU_METHOD_OF_DECLARE definition we did previously.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 SoC has a different pin controller for PL and PM banks.
Define this new controller in the device tree.
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A31 has two ECHI/OHCI controllers, and one OHCI-only phy-less controller.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>

The USB clocks of the A31 seems to be parented to the 24MHz oscillator, and
handle the clocks for the USB phys and OHCI devices.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>