A number of NAND flashes have a capability called "on-die ECC" where the
NAND chip itself is capable of detecting and correcting errors.

Linux already has support for using the ECC implementation of the NAND
controller, or a software based ECC implementation, but not for using
the ECC implementation of the NAND controller. However, such an
implementation is sometimes useful in situations where the NAND
controller provides ECC algorithms that are not strong enough for the
NAND chip used on the system. A typical case is a NAND chip that
requires a 4-bit ECC, while the NAND controller only provides a 1-bit
ECC algorithm.

This commit introduces the support for the NAND_ECC_ON_DIE ECC mode:

 - Parsing of the "on-die" value for the "nand-ecc-mode" Device Tree
   property

 - Handling NAND_ECC_ON_DIE case in nand_scan_tail(). The idea is that
   the vendor specific code for the NAND chip must implement
   ->read_page() and ->write_page(). It may optionally provide its own
   ->read_page_raw() and ->write_page_raw() as well. For OOB operation,
   we assume the standard operations are good enough, but they can be
   overridden by the vendor specific code if needed.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: NRichard Weinberger <richard@nod.at>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf.  Drivers using DMA will be unhappy about unaligned
buffer.

The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer.  If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The comment for ecc.read_page() requires that it should return
"0 if bitflips uncorrectable".

Actually, drivers could return positive values when uncorrectable
bitflips occur.  For example, nand_read_page_swecc() is the case.
If ecc.correct() returns -EBADMSG for the first ECC sector, and
a positive value for the second one, nand_read_page_swecc() returns
a positive max_bitflips and increments ecc_stats.failed for the same
page.

The requirement can be relaxed by tweaking nand_do_read_ops().
Move the max_bitflips calculation below the retry.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The last/only user of the chip->write_page() hook (the Atmel NAND
controller driver) has been reworked and is no longer specifying a custom
->write_page() implementation.
Drop this hook before someone else start abusing it.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>

Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>

Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>

Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>

Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>

A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.

Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

There is no reason to expose the NAND manufacturer table. Provide an
helper function to find manufacturers by their id.

We also turn the nand_manufacturers table into a const array, since its
members are not modified after the initial assignment.

Finally, we remove the sentinel manufacturer entry from the manufacturers
table (we already have the array size information given by ARRAY_SIZE()),
and add the nand_manufacturer_name() helper to handle the "Unknown" case
properly.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRichard Weinberger <richard@nod.at>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>

The fields max_bb_per_die and blocks_per_die are useful determining the
number of bad blocks a MTD needs to allocate. How they are set will
depend on if the chip is ONFI, JEDEC or a full-id entry in the nand_ids
table.
Signed-off-by: NZach Brown <zach.brown@ni.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electron.com>
Acked-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add WINBOND manufacturer id.
Signed-off-by: NAndrey Jr. Melnikov <temnota.am@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Fix kernel-doc warnings in <linux/mtd/nand.h>:

..//include/linux/mtd/nand.h:658: warning: No description found for parameter 'tCEH_min'
..//include/linux/mtd/nand.h:877: warning: No description found for parameter 'data_interface'

Fixes: eee64b70 ("mtd: nand: Introduce nand_data_interface")
Signed-off-by: NRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Drivers implementing ->cmd_ctrl() and relying on the default ->cmdfunc()
implementation usually don't wait tCCS when a column change (RNDIN or
RNDOUT) is requested.
Add an option flag to ask the core to do so (note that we keep this as
an opt-in to avoid breaking existing implementations), and make use of
the ->data_interface information is available (otherwise, wait 500ns).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>

Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>

When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.

Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.

Also make sure to actually apply the new data interface setting on the
first die.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd ("mtd: nand: automate NAND timings selection")
Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de>
Tested-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>

Provide a nand_cleanup() function to free all nand related resources
without unregistering the mtd device.
This should allow drivers to call mtd_device_unregister() and handle
its return value and still being able to cleanup all nand related
resources.
Signed-off-by: NRichard Weinberger <richard@nod.at>
Signed-off-by: NDaniel Walter <dwalter@sigma-star.at>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.

In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).

Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>

The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.

Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.

NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

onfi_init_data_interface() initializes a data interface with
values from a given ONFI mode.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Currently we have no data structure to fully describe a NAND timing.
We only have struct nand_sdr_timings for NAND timings in SDR mode,
but nothing for DDR mode and also no container to store both types
of timing.
This patch adds struct nand_data_interface which stores the timing
type and a union of different timings. This can be used to pass to
drivers in order to configure the timing.
Add kerneldoc for struct nand_sdr_timings while touching it anyway.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall be used. To get a common place where this initialization can be
implemented create a nand_reset() function. This currently only issues
a NAND_CMD_RESET to the NAND device. The places issuing this command
manually are replaced with a call to nand_reset().
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

'extern' is not necessary for function declarations. To prevent
people from adding the keyword to new declarations remove the
existing ones.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The code to initialize a struct nand_hw_control is duplicated across
several drivers. Factorize it using an inline function.
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

I got device with ESMT (Elite Semiconductor Memory Technology Inc)
F59L1G81MA flash that was detected as:
[    0.852034] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1
[    0.858402] nand: Unknown NAND 128MiB 3,3V 8-bit
[    0.863031] nand: 128MiB, SLC, page size: 2048, OOB size: 64

According to the F59L1G81MA datasheet (and Read Id documentation) C8h is
a "Maker Code" which should mean ESMT. Add it to fix above "Unknown".
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

This value should not be part of nand_ecc_modes_t as it specifies
algorithm not a mode. We successfully managed to introduce new "algo"
field which is respected now.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Now that all NAND drivers have switched to mtd_ooblayout_ops, we can kill
the ecc->layout field.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Replace the default nand_ecclayout definitions for large and small page
devices with the equivalent mtd_ooblayout_ops.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Export the default read/write oob functions (for the standard and syndrome
scheme), so that drivers can use them for their raw implementation and
implement their own functions for the normal oob operation.

This is required if your ECC engine is capable of fixing some of the OOB
data. In this case you have to overload the ->read_oob() and ->write_oob(),
but if you don't specify the ->read/write_oob_raw() functions they are
assigned to the ->read/write_oob() implementation, which is not what you
want.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH.
This enum should store ECC mode only and putting algorithm details there
is a bad idea. It would result in too many values impossible to support
in a sane way.

To solve this problem let's add a new enum. We'll have to modify all
drivers to set it properly but once it's done it'll be possible to drop
NAND_ECC_SOFT_BCH. That will result in a cleaner design and more
possibilities like setting ECC algorithm for hardware ECC mode.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

One of the arguments passed to struct nand_chip's block_bad op is
'getchip', which, if true, is supposed to get and select the nand device,
and later unselect and release the device.

This op is intended to be replaceable by drivers. The drivers shouldn't
be responsible for selecting/unselecting chip. Like other ops, the chip
should already be selected before the block_bad op is called.

Remove the getchip argument from the block_bad op and
nand_block_checkbad. Move the chip selection to nand_block_isbad, since it
is the only caller to nand_block_checkbad which requires chip selection.

Modify nand_block_bad (the default function for the op) such that it
doesn't select the chip.

Remove the getchip argument from the bad_block funcs in cafe_nand,
diskonchip and docg4 drivers.
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NArchit Taneja <architt@codeaurora.org>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This field is not set in any board file and can thus be dropped.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Some MLC NANDs are sensitive to repeated patterns and require data to be
scrambled in order to limit the number of bitflips.
Add a new flag to let the NAND controller know about this constraint.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
refactoring.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>