1. 07 1月, 2020 1 次提交
  2. 06 1月, 2020 3 次提交
  3. 03 1月, 2020 4 次提交
  4. 31 12月, 2019 1 次提交
  5. 30 12月, 2019 2 次提交
  6. 22 12月, 2019 3 次提交
  7. 20 12月, 2019 5 次提交
  8. 19 12月, 2019 1 次提交
  9. 14 12月, 2019 1 次提交
  10. 10 12月, 2019 1 次提交
    • C
      drm/i915/gt: Detect if we miss WaIdleLiteRestore · 82c69bf5
      Chris Wilson 提交于
      In order to avoid confusing the HW, we must never submit an empty ring
      during lite-restore, that is we should always advance the RING_TAIL
      before submitting to stay ahead of the RING_HEAD.
      
      Normally this is prevented by keeping a couple of spare NOPs in the
      request->wa_tail so that on resubmission we can advance the tail. This
      relies on the request only being resubmitted once, which is the normal
      condition as it is seen once for ELSP[1] and then later in ELSP[0]. On
      preemption, the requests are unwound and the tail reset back to the
      normal end point (as we know the request is incomplete and therefore its
      RING_HEAD is even earlier).
      
      However, if this w/a should fail we would try and resubmit the request
      with the RING_TAIL already set to the location of this request's wa_tail
      potentially causing a GPU hang. We can spot when we do try and
      incorrectly resubmit without advancing the RING_TAIL and spare any
      embarrassment by forcing the context restore.
      
      In the case of preempt-to-busy, we leave the requests running on the HW
      while we unwind. As the ring is still live, we cannot rewind our
      rq->tail without forcing a reload so leave it set to rq->wa_tail and
      only force a reload if we resubmit after a lite-restore. (Normally, the
      forced reload will be a part of the preemption event.)
      
      Fixes: 22b7a426 ("drm/i915/execlists: Preempt-to-busy")
      Closes: https://gitlab.freedesktop.org/drm/intel/issues/673Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: stable@kernel.vger.org
      Link: https://patchwork.freedesktop.org/patch/msgid/20191209023215.3519970-1-chris@chris-wilson.co.uk
      82c69bf5
  11. 06 12月, 2019 1 次提交
    • C
      drm/i915/gt: Save irqstate around virtual_context_destroy · 6f7ac828
      Chris Wilson 提交于
      As virtual_context_destroy() may be called from a request signal, it may
      be called from inside an irq-off section, and so we need to do a full
      save/restore of the irq state rather than blindly re-enable irqs upon
      unlocking.
      
      <4> [110.024262] WARNING: inconsistent lock state
      <4> [110.024277] 5.4.0-rc8-CI-CI_DRM_7489+ #1 Tainted: G     U
      <4> [110.024292] --------------------------------
      <4> [110.024305] inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage.
      <4> [110.024323] kworker/0:0/5 [HC0[0]:SC0[0]:HE1:SE1] takes:
      <4> [110.024338] ffff88826a0c7a18 (&(&rq->lock)->rlock){?.-.}, at: i915_request_retire+0x221/0x930 [i915]
      <4> [110.024592] {IN-HARDIRQ-W} state was registered at:
      <4> [110.024612]   lock_acquire+0xa7/0x1c0
      <4> [110.024627]   _raw_spin_lock_irqsave+0x33/0x50
      <4> [110.024788]   intel_engine_breadcrumbs_irq+0x38c/0x600 [i915]
      <4> [110.024808]   irq_work_run_list+0x49/0x70
      <4> [110.024824]   irq_work_run+0x26/0x50
      <4> [110.024839]   smp_irq_work_interrupt+0x44/0x1e0
      <4> [110.024855]   irq_work_interrupt+0xf/0x20
      <4> [110.024871]   __do_softirq+0xb7/0x47f
      <4> [110.024885]   irq_exit+0xba/0xc0
      <4> [110.024898]   do_IRQ+0x83/0x160
      <4> [110.024910]   ret_from_intr+0x0/0x1d
      <4> [110.024922] irq event stamp: 172864
      <4> [110.024938] hardirqs last  enabled at (172863): [<ffffffff819ea214>] _raw_spin_unlock_irq+0x24/0x50
      <4> [110.024963] hardirqs last disabled at (172864): [<ffffffff819e9fba>] _raw_spin_lock_irq+0xa/0x40
      <4> [110.024988] softirqs last  enabled at (172812): [<ffffffff81c00385>] __do_softirq+0x385/0x47f
      <4> [110.025012] softirqs last disabled at (172797): [<ffffffff810b829a>] irq_exit+0xba/0xc0
      <4> [110.025031]
      other info that might help us debug this:
      <4> [110.025049]  Possible unsafe locking scenario:
      
      <4> [110.025065]        CPU0
      <4> [110.025075]        ----
      <4> [110.025084]   lock(&(&rq->lock)->rlock);
      <4> [110.025099]   <Interrupt>
      <4> [110.025109]     lock(&(&rq->lock)->rlock);
      <4> [110.025124]
       *** DEADLOCK ***
      
      <4> [110.025144] 4 locks held by kworker/0:0/5:
      <4> [110.025156]  #0: ffff88827588f528 ((wq_completion)events){+.+.}, at: process_one_work+0x1de/0x620
      <4> [110.025187]  #1: ffffc9000006fe78 ((work_completion)(&engine->retire_work)){+.+.}, at: process_one_work+0x1de/0x620
      <4> [110.025219]  #2: ffff88825605e270 (&kernel#2){+.+.}, at: engine_retire+0x57/0xe0 [i915]
      <4> [110.025405]  #3: ffff88826a0c7a18 (&(&rq->lock)->rlock){?.-.}, at: i915_request_retire+0x221/0x930 [i915]
      <4> [110.025634]
      stack backtrace:
      <4> [110.025653] CPU: 0 PID: 5 Comm: kworker/0:0 Tainted: G     U            5.4.0-rc8-CI-CI_DRM_7489+ #1
      <4> [110.025675] Hardware name:  /NUC7i5BNB, BIOS BNKBL357.86A.0054.2017.1025.1822 10/25/2017
      <4> [110.025856] Workqueue: events engine_retire [i915]
      <4> [110.025872] Call Trace:
      <4> [110.025891]  dump_stack+0x71/0x9b
      <4> [110.025907]  mark_lock+0x49a/0x500
      <4> [110.025926]  ? print_shortest_lock_dependencies+0x200/0x200
      <4> [110.025946]  mark_held_locks+0x49/0x70
      <4> [110.025962]  ? _raw_spin_unlock_irq+0x24/0x50
      <4> [110.025978]  lockdep_hardirqs_on+0xa2/0x1c0
      <4> [110.025995]  _raw_spin_unlock_irq+0x24/0x50
      <4> [110.026171]  virtual_context_destroy+0xc5/0x2e0 [i915]
      <4> [110.026376]  __active_retire+0xb4/0x290 [i915]
      <4> [110.026396]  dma_fence_signal_locked+0x9e/0x1b0
      <4> [110.026613]  i915_request_retire+0x451/0x930 [i915]
      <4> [110.026766]  retire_requests+0x4d/0x60 [i915]
      <4> [110.026919]  engine_retire+0x63/0xe0 [i915]
      
      Fixes: b1e3177b ("drm/i915: Coordinate i915_active with its own mutex")
      Fixes: 6d06779e ("drm/i915: Load balancing across a virtual engine")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191205145934.663183-1-chris@chris-wilson.co.uk
      6f7ac828
  12. 04 12月, 2019 1 次提交
  13. 03 12月, 2019 2 次提交
  14. 30 11月, 2019 1 次提交
  15. 25 11月, 2019 7 次提交
  16. 21 11月, 2019 2 次提交
  17. 20 11月, 2019 1 次提交
  18. 13 11月, 2019 1 次提交
    • C
      drm/i915/execlists: Move reset_active() from schedule-out to schedule-in · 98ae6fb3
      Chris Wilson 提交于
      The gem_ctx_persistence/smoketest was detecting an odd coherency issue
      inside the LRC context image; that the address of the ring buffer did
      not match our associated struct intel_ring. As we set the address into
      the context image when we pin the ring buffer into place before the
      context is active, that leaves the question of where did it get
      overwritten. Either the HW context save occurred after our pin which
      would imply that our idle barriers are broken, or we overwrote the
      context image ourselves. It is only in reset_active() where we dabble
      inside the context image outside of a serialised path from schedule-out;
      but we could equally perform the operation inside schedule-in which is
      then fully serialised with the context pin -- and remains serialised by
      the engine pulse with kill_context(). (The only downside, aside from
      doing more work inside the engine->active.lock, was the plan to merge
      all the reset paths into doing their context scrubbing on schedule-out
      needs more thought.)
      
      Fixes: d12acee8 ("drm/i915/execlists: Cancel banned contexts on schedule-out")
      Testcase: igt/gem_ctx_persistence/smoketest
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191111133205.11590-3-chris@chris-wilson.co.uk
      (cherry picked from commit 31b61f0e)
      Signed-off-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      98ae6fb3
  19. 12 11月, 2019 1 次提交
    • C
      drm/i915/execlists: Move reset_active() from schedule-out to schedule-in · 31b61f0e
      Chris Wilson 提交于
      The gem_ctx_persistence/smoketest was detecting an odd coherency issue
      inside the LRC context image; that the address of the ring buffer did
      not match our associated struct intel_ring. As we set the address into
      the context image when we pin the ring buffer into place before the
      context is active, that leaves the question of where did it get
      overwritten. Either the HW context save occurred after our pin which
      would imply that our idle barriers are broken, or we overwrote the
      context image ourselves. It is only in reset_active() where we dabble
      inside the context image outside of a serialised path from schedule-out;
      but we could equally perform the operation inside schedule-in which is
      then fully serialised with the context pin -- and remains serialised by
      the engine pulse with kill_context(). (The only downside, aside from
      doing more work inside the engine->active.lock, was the plan to merge
      all the reset paths into doing their context scrubbing on schedule-out
      needs more thought.)
      
      Fixes: d12acee8 ("drm/i915/execlists: Cancel banned contexts on schedule-out")
      Testcase: igt/gem_ctx_persistence/smoketest
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191111133205.11590-3-chris@chris-wilson.co.uk
      31b61f0e
  20. 11 11月, 2019 1 次提交