1. 04 7月, 2022 6 次提交
    • A
      mlxsw: Enable unified bridge model · 77b7f83d
      Amit Cohen 提交于
      After all the preparations for unified bridge model, finally flip mlxsw
      driver to use the new model.
      
      Change config profile, set 'ubridge' to true and remove the configurations
      that are relevant only for the legacy model. Set 'flood_mode' to
      'controlled' as the current mode is not supported with unified bridge
      model.
      
      Remove all the code which is dedicated to the legacy model. Remove
      'struct mlxsw_sp.ubridge' variable which was temporarily added to separate
      configurations between the models.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      77b7f83d
    • A
      mlxsw: Add support for 802.1Q FID family · bf73904f
      Amit Cohen 提交于
      Using the legacy bridge model, there is no VID classification at egress
      for 802.1Q FIDs, which means that the VID is maintained.
      
      This behavior cause the limitation that 802.1Q FIDs cannot work with VXLAN.
      This limitation stems from the fact that a decapsulated VXLAN packet should
      not contain a VLAN tag. If such a packet was to egress from a local port
      using a 802.1Q FID, it would "maintain" its VLAN on egress, which is no
      VLAN at all.
      
      Currently 802.1Q FIDs are emulated in mlxsw driver using 802.1D FIDs. Using
      unified bridge model, there is a FID->VID mapping, so it is possible to
      stop emulating 802.1Q FIDs.
      
      The main changes are:
      1. Use 'SFGC.bridge_type' = 0, to separate between 802.1Q FIDs and
         802.1D FIDs.
      2. Use VLAN RIF instead of the emulated one (VLAN_EMU which is emulated
         using FID RIF).
      3. Create VID->FID mapping when the FID is created. Then when a new port
         is mapped to the FID, if it not in virtual mode, no new mapping is
         needed. Save the new port in 'port_vid_list', to be able to update a
         RIF in all {Port, VID}->FID mappings in case that the port will be in
         virtual mode later.
      4. Add a dedicated operation function per FID family to update RIF for
         VID->FID mappings. For 802.1d and rFID families, just return. For
         802.1q family, handle the global mapping which is created for new 802.1q
         FID.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bf73904f
    • A
      mlxsw: Add support for VLAN RIFs · 662761d8
      Amit Cohen 提交于
      Router interfaces (RIFs) constructed on top of VLAN-aware bridges are of
      'VLAN' type, whereas RIFs constructed on top of VLAN-unaware bridges are of
      'FID' type.
      
      Currently 802.1Q FIDs are emulated using 802.1D FIDs, therefore VLAN RIFs
      are emulated using FID RIFs. As part of converting the driver to use
      unified bridge model, 802.1Q FIDs and VLAN RIFs will be used.
      
      The egress FID is required for VLAN RIFs in Spectrum-2 and above, but not
      in Spectrum-1, as in Spectrum-1 the mapping for VLAN RIFs is VID->FID,
      while in other ASICs it is FID->FID. The reason for the change is that it
      is more scalable to reuse the FID->FID entry than creating multiple
      {Port, VID}->FID entries for the router port. Use the existing operation
      structure to separate the configuration between different ASICs.
      
      Add support for VLAN RIFs, most of the configurations are same to FID
      RIFs.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      662761d8
    • A
      mlxsw: Configure egress FID classification after routing · 058de325
      Amit Cohen 提交于
      After routing, a packet needs to perform an L2 lookup using the DMAC it got
      from the routing and a FID. In unified bridge model, the egress FID
      configuration needs to be performed by software.
      
      It is configured by RITR for both sub-port RIFs and FID RIFs. Currently
      FID RIFs already configure eFID. Add eFID configuration for sub-port RIFs.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      058de325
    • A
      mlxsw: spectrum_router: Do not configure VID for sub-port RIFs · 2c3ae763
      Amit Cohen 提交于
      The field 'vid' in RITR is reserved when unified bridge model is used
      and the RIF's type is sub-port RIF. Instead, ingress VID is configured via
      SVFA and egress VID is configured via REIV.
      
      Set 'vid' to zero in RITR register for sub-port RIF when unified bridge
      model is used.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2c3ae763
    • A
      mlxsw: Configure ingress RIF classification · fea20547
      Amit Cohen 提交于
      Before layer 2 forwarding, the device classifies an incoming packet to
      a FID. The classification is done based on one of the following keys:
      
      1. FID
      2. VNI (after decapsulation)
      3. VID / {Port, VID}
      
      After classification, the FID is known, but also all the attributes of
      the FID, such as the router interface (RIF) via which a packet that
      needs to be routed will ingress the router block.
      
      In the legacy model, when a RIF was created / destroyed, it was
      firmware's responsibility to update it in the previously mentioned FID
      classification records. In the unified bridge model, this responsibility
      moved to software.
      
      The third classification requires to iterate over the FID's {Port, VID}
      list and issue SVFA write with the correct mapping table according to the
      port's mode (virtual or not). We never map multiple VLANs to the same FID
      using VID->FID mapping, so such a mapping needs to be performed once.
      
      When a new FID classification entry is configured and the FID already has
      a RIF, set the RIF as part of SVFA configuration.
      
      The reverse needs to be done when clearing a RIF from a FID. Currently,
      clearing is done by issuing mlxsw_sp_fid_rif_set() with a NULL RIF pointer.
      Instead, introduce mlxsw_sp_fid_rif_unset().
      
      Note that mlxsw_sp_fid_rif_set() is called after the RIF is fully
      operational, so it conforms to the internal requirement regarding
      SVFA.irif_v: "Must not be set for a non-enabled RIF".
      
      Do not set the ingress RIF for rFIDs, as the {Port, VID}->rFID entry is
      configured by firmware when legacy model is used, a next patch will
      handle this configuration for rFIDs and unified bridge model.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Reviewed-by: NPetr Machata <petrm@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fea20547
  2. 30 6月, 2022 1 次提交
  3. 24 6月, 2022 2 次提交
  4. 17 6月, 2022 2 次提交
  5. 15 6月, 2022 3 次提交
  6. 08 5月, 2022 6 次提交
  7. 04 5月, 2022 1 次提交
  8. 12 4月, 2022 3 次提交
  9. 06 4月, 2022 1 次提交
  10. 03 3月, 2022 2 次提交
  11. 15 12月, 2021 1 次提交
    • A
      mlxsw: Add support for VxLAN with IPv6 underlay · 06c08f86
      Amit Cohen 提交于
      Currently, mlxsw driver supports VxLAN with IPv4 underlay only.
      Add support for IPv6 underlay.
      
      The main differences are:
      
      * Learning is not supported for IPv6 FDB entries, use static entries and
        do not allow 'learning' flag for IPv6 VxLAN.
      
      * IPv6 addresses for FDB entries should be saved as part of KVDL.
        Use the new API to allocate and release entries for IPv6 addresses.
      
      * Spectrum ASICs do not fill UDP checksum, while in software IPv6 UDP
        packets with checksum zero are dropped.
        Force the relevant flags which allow the VxLAN device to generate UDP
        packets with zero checksum and also receive them.
      Signed-off-by: NAmit Cohen <amcohen@nvidia.com>
      Signed-off-by: NIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      06c08f86
  12. 14 12月, 2021 1 次提交
  13. 01 12月, 2021 1 次提交
  14. 23 11月, 2021 1 次提交
  15. 26 10月, 2021 3 次提交
  16. 24 9月, 2021 6 次提交