1. 27 4月, 2011 1 次提交
  2. 07 2月, 2011 1 次提交
  3. 29 11月, 2010 1 次提交
  4. 02 9月, 2010 2 次提交
    • P
      powerpc: Account time using timebase rather than PURR · cf9efce0
      Paul Mackerras 提交于
      Currently, when CONFIG_VIRT_CPU_ACCOUNTING is enabled, we use the
      PURR register for measuring the user and system time used by
      processes, as well as other related times such as hardirq and
      softirq times.  This turns out to be quite confusing for users
      because it means that a program will often be measured as taking
      less time when run on a multi-threaded processor (SMT2 or SMT4 mode)
      than it does when run on a single-threaded processor (ST mode), even
      though the program takes longer to finish.  The discrepancy is
      accounted for as stolen time, which is also confusing, particularly
      when there are no other partitions running.
      
      This changes the accounting to use the timebase instead, meaning that
      the reported user and system times are the actual number of real-time
      seconds that the program was executing on the processor thread,
      regardless of which SMT mode the processor is in.  Thus a program will
      generally show greater user and system times when run on a
      multi-threaded processor than on a single-threaded processor.
      
      On pSeries systems on POWER5 or later processors, we measure the
      stolen time (time when this partition wasn't running) using the
      hypervisor dispatch trace log.  We check for new entries in the
      log on every entry from user mode and on every transition from
      kernel process context to soft or hard IRQ context (i.e. when
      account_system_vtime() gets called).  So that we can correctly
      distinguish time stolen from user time and time stolen from system
      time, without having to check the log on every exit to user mode,
      we store separate timestamps for exit to user mode and entry from
      user mode.
      
      On systems that have a SPURR (POWER6 and POWER7), we read the SPURR
      in account_system_vtime() (as before), and then apportion the SPURR
      ticks since the last time we read it between scaled user time and
      scaled system time according to the relative proportions of user
      time and system time over the same interval.  This avoids having to
      read the SPURR on every kernel entry and exit.  On systems that have
      PURR but not SPURR (i.e., POWER5), we do the same using the PURR
      rather than the SPURR.
      
      This disables the DTL user interface in /sys/debug/kernel/powerpc/dtl
      for now since it conflicts with the use of the dispatch trace log
      by the time accounting code.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cf9efce0
    • P
      powerpc: Abstract indexing of lppaca structs · 8154c5d2
      Paul Mackerras 提交于
      Currently we have the lppaca structs as a simple array of NR_CPUS
      entries, taking up space in the data section of the kernel image.
      In future we would like to allocate them dynamically, so this
      abstracts out the accesses to the array, making it easier to
      change how we locate the lppaca for a given cpu in future.
      Specifically, lppaca[cpu] changes to lppaca_of(cpu).
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8154c5d2
  5. 21 5月, 2010 1 次提交
    • M
      powerpc/kexec: Speedup kexec hash PTE tear down · d504bed6
      Michael Neuling 提交于
      Currently for kexec the PTE tear down on 1TB segment systems normally
      requires 3 hcalls for each PTE removal. On a machine with 32GB of
      memory it can take around a minute to remove all the PTEs.
      
      This optimises the path so that we only remove PTEs that are valid.
      It also uses the read 4 PTEs at once HCALL.  For the common case where
      a PTEs is invalid in a 1TB segment, this turns the 3 HCALLs per PTE
      down to 1 HCALL per 4 PTEs.
      
      This gives an > 10x speedup in kexec times on PHYP, taking a 32GB
      machine from around 1 minute down to a few seconds.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d504bed6
  6. 28 10月, 2009 2 次提交
  7. 08 7月, 2009 1 次提交
  8. 21 5月, 2009 1 次提交
  9. 15 7月, 2008 1 次提交
  10. 09 7月, 2008 1 次提交
  11. 14 5月, 2008 1 次提交
  12. 24 4月, 2008 2 次提交
  13. 17 4月, 2008 2 次提交
  14. 26 2月, 2008 1 次提交
  15. 15 1月, 2008 1 次提交
    • P
      [POWERPC] Fix boot failure on POWER6 · dfbe0d3b
      Paul Mackerras 提交于
      Commit 473980a9 added a call to clear
      the SLB shadow buffer before registering it.  Unfortunately this means
      that we clear out the entries that slb_initialize has previously set in
      there.  On POWER6, the hypervisor uses the SLB shadow buffer when doing
      partition switches, and that means that after the next partition switch,
      each non-boot CPU has no SLB entries to map the kernel text and data,
      which causes it to crash.
      
      This fixes it by reverting most of 473980a9 and instead clearing the
      3rd entry explicitly in slb_initialize.  This fixes the problem that
      473980a9 was trying to solve, but without breaking POWER6.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dfbe0d3b
  16. 11 1月, 2008 1 次提交
  17. 12 10月, 2007 1 次提交
    • P
      [POWERPC] Use 1TB segments · 1189be65
      Paul Mackerras 提交于
      This makes the kernel use 1TB segments for all kernel mappings and for
      user addresses of 1TB and above, on machines which support them
      (currently POWER5+, POWER6 and PA6T).
      
      We detect that the machine supports 1TB segments by looking at the
      ibm,processor-segment-sizes property in the device tree.
      
      We don't currently use 1TB segments for user addresses < 1T, since
      that would effectively prevent 32-bit processes from using huge pages
      unless we also had a way to revert to using 256MB segments.  That
      would be possible but would involve extra complications (such as
      keeping track of which segment size was used when HPTEs were inserted)
      and is not addressed here.
      
      Parts of this patch were originally written by Ben Herrenschmidt.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1189be65
  18. 17 8月, 2007 1 次提交
  19. 25 6月, 2007 1 次提交
  20. 07 5月, 2007 1 次提交
  21. 13 4月, 2007 1 次提交
  22. 22 3月, 2007 1 次提交
  23. 08 2月, 2007 1 次提交
  24. 07 2月, 2007 1 次提交
  25. 16 10月, 2006 1 次提交
  26. 08 8月, 2006 1 次提交
  27. 01 8月, 2006 1 次提交
    • A
      [POWERPC] clean up pseries hcall interfaces · b9377ffc
      Anton Blanchard 提交于
      Our pseries hcall interfaces are out of control:
      
      	plpar_hcall_norets
      	plpar_hcall
      	plpar_hcall_8arg_2ret
      	plpar_hcall_4out
      	plpar_hcall_7arg_7ret
      	plpar_hcall_9arg_9ret
      
      Create 3 interfaces to cover all cases:
      
      	plpar_hcall_norets:	7 arguments no returns
      	plpar_hcall:		6 arguments 4 returns
      	plpar_hcall9:		9 arguments 9 returns
      
      There are only 2 cases in the kernel that need plpar_hcall9, hopefully
      we can keep it that way.
      
      Pass in a buffer to stash return parameters so we avoid the &dummy1,
      &dummy2 madness.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      --
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      b9377ffc
  28. 31 7月, 2006 1 次提交
  29. 01 7月, 2006 1 次提交
  30. 28 6月, 2006 1 次提交
  31. 01 4月, 2006 2 次提交
  32. 13 1月, 2006 1 次提交
    • D
      [PATCH] powerpc: Remove lppaca structure from the PACA · 3356bb9f
      David Gibson 提交于
      At present the lppaca - the structure shared with the iSeries
      hypervisor and phyp - is contained within the PACA, our own low-level
      per-cpu structure.  This doesn't have to be so, the patch below
      removes it, making a separate array of lppaca structures.
      
      This saves approximately 500*NR_CPUS bytes of image size and kernel
      memory, because we don't need aligning gap between the Linux and
      hypervisor portions of every PACA.  On the other hand it means an
      extra level of dereference in many accesses to the lppaca.
      
      The patch also gets rid of several places where we assign the paca
      address to a local variable for no particular reason.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3356bb9f
  33. 09 1月, 2006 3 次提交
    • B
      [PATCH] powerpc: udbg updates · bb6b9b28
      Benjamin Herrenschmidt 提交于
      The udbg low level io layer has an issue with udbg_getc() returning a
      char (unsigned on ppc) instead of an int, thus the -1 if you had no
      available input device could end up turned into 0xff, filling your
      display with bogus characters. This fixes it, along with adding a little
      blob to xmon to do a delay before exiting when getting an EOF and fixing
      the detection of ADB keyboards in udbg_adb.c
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      bb6b9b28
    • B
      [PATCH] powerpc: Unify udbg (#2) · 51d3082f
      Benjamin Herrenschmidt 提交于
      This patch unifies udbg for both ppc32 and ppc64 when building the
      merged achitecture. xmon now has a single "back end". The powermac udbg
      stuff gets enriched with some ADB capabilities and btext output. In
      addition, the early_init callback is now called on ppc32 as well,
      approx. in the same order as ppc64 regarding device-tree manipulations.
      The init sequences of ppc32 and ppc64 are getting closer, I'll unify
      them in a later patch.
      
      For now, you can force udbg to the scc using "sccdbg" or to btext using
      "btextdbg" on powermacs. I'll implement a cleaner way of forcing udbg
      output to something else than the autodetected OF output device in a
      later patch.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      51d3082f
    • B
      [PATCH] powerpc: serial port discovery (#2) · 463ce0e1
      Benjamin Herrenschmidt 提交于
      This moves the discovery of legacy serial ports to a separate file,
      makes it common to ppc32 and ppc64, and reworks it to use the new OF
      address translators to get to the ports early. This new version can also
      detect some PCI serial cards using legacy chips and will probably match
      those discovered port with the default console choice.
      
      Only ppc64 gets udbg still yet, unifying udbg isn't finished yet.
      
      It also adds some speed-probing code to udbg so that the default console
      can come up at the same speed it was set to by the firmware.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      463ce0e1