- 15 1月, 2021 5 次提交
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由 Guo Ren 提交于
This patch adds support for uprobes on riscv architecture. Just like kprobe, it support single-step and simulate instructions. Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Reviewed-by: NPekka Enberg <penberg@kernel.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Guo Ren 提交于
This patch adds support for kprobes on ftrace call sites to avoids much of the overhead with regular kprobes. Try it with simple steps: echo 'p:myprobe sys_clone a0=%a0 a1=%a1 stack_val=+4($stack)' > /sys/kernel/de bug/tracing/kprobe_events echo 1 > /sys/kernel/debug/tracing/events/kprobes/enable cat /sys/kernel/debug/tracing/trace tracer: nop entries-in-buffer/entries-written: 1/1 #P:1 _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | sh-92 [000] .... 369.899962: myprobe: (sys_clone+0x0/0x28) a0=0x1200011 a1=0x0 stack_val=0x201c20ffffffe0 cat /sys/kernel/debug/kprobes/list ffffffe00020b584 k sys_clone+0x0 [FTRACE] ^^^^^^ Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Reviewed-by: NMasami Hiramatsu <mhiramat@kernel.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Guo Ren 提交于
This patch enables "kprobe & kretprobe" to work with ftrace interface. It utilized software breakpoint as single-step mechanism. Some instructions which can't be single-step executed must be simulated in kernel execution slot, such as: branch, jal, auipc, la ... Some instructions should be rejected for probing and we use a blacklist to filter, such as: ecall, ebreak, ... We use ebreak & c.ebreak to replace origin instruction and the kprobe handler prepares an executable memory slot for out-of-line execution with a copy of the original instruction being probed. In execution slot we add ebreak behind original instruction to simulate a single-setp mechanism. The patch is based on packi's work [1] and csky's work [2]. - The kprobes_trampoline.S is all from packi's patch - The single-step mechanism is new designed for riscv without hw single-step trap - The simulation codes are from csky - Frankly, all codes refer to other archs' implementation [1] https://lore.kernel.org/linux-riscv/20181113195804.22825-1-me@packi.ch/ [2] https://lore.kernel.org/linux-csky/20200403044150.20562-9-guoren@kernel.org/Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Co-developed-by: NPatrick Stählin <me@packi.ch> Signed-off-by: NPatrick Stählin <me@packi.ch> Acked-by: NMasami Hiramatsu <mhiramat@kernel.org> Tested-by: NZong Li <zong.li@sifive.com> Reviewed-by: NPekka Enberg <penberg@kernel.org> Cc: Patrick Stählin <me@packi.ch> Cc: Palmer Dabbelt <palmerdabbelt@google.com> Cc: Björn Töpel <bjorn.topel@gmail.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Patrick Stählin 提交于
Needed for kprobes support. Copied and adapted from arm64 code. Guo Ren fixup pt_regs type for linux-5.8-rc1. Signed-off-by: NPatrick Stählin <me@packi.ch> Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Reviewed-by: NPekka Enberg <penberg@kernel.org> Reviewed-by: NZong Li <zong.li@sifive.com> Reviewed-by: NMasami Hiramatsu <mhiramat@kernel.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Atish Patra 提交于
Use the generic numa implementation to add NUMA support for RISC-V. This is based on Greentime's patch[1] but modified to use generic NUMA implementation and few more fixes. [1] https://lkml.org/lkml/2020/1/10/233Co-developed-by: NGreentime Hu <greentime.hu@sifive.com> Signed-off-by: NGreentime Hu <greentime.hu@sifive.com> Signed-off-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 16 12月, 2020 1 次提交
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由 Mike Rapoport 提交于
The design of DEBUG_PAGEALLOC presumes that __kernel_map_pages() must never fail. With this assumption is wouldn't be safe to allow general usage of this function. Moreover, some architectures that implement __kernel_map_pages() have this function guarded by #ifdef DEBUG_PAGEALLOC and some refuse to map/unmap pages when page allocation debugging is disabled at runtime. As all the users of __kernel_map_pages() were converted to use debug_pagealloc_map_pages() it is safe to make it available only when DEBUG_PAGEALLOC is set. Link: https://lkml.kernel.org/r/20201109192128.960-4-rppt@kernel.orgSigned-off-by: NMike Rapoport <rppt@linux.ibm.com> Acked-by: NDavid Hildenbrand <david@redhat.com> Acked-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Andy Lutomirski <luto@kernel.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Christoph Lameter <cl@linux.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Rientjes <rientjes@google.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com> Cc: Len Brown <len.brown@intel.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Pekka Enberg <penberg@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Will Deacon <will@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 12月, 2020 1 次提交
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由 Palmer Dabbelt 提交于
This allows us to enable STRICT_DEVMEM. Reviewed-by: NLuis Chamberlain <mcgrof@kernel.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 26 11月, 2020 1 次提交
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由 Kefeng Wang 提交于
Convert to ARCH_STACKWALK to reduce duplicated code in stack trace. Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 21 11月, 2020 1 次提交
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由 Kefeng Wang 提交于
RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING. Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 31 10月, 2020 1 次提交
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由 Arnd Bergmann 提交于
Almost all machines use GENERIC_CLOCKEVENTS, so it feels wrong to require each one to select that symbol manually. Instead, enable it whenever CONFIG_LEGACY_TIMER_TICK is disabled as a simplification. It should be possible to select both GENERIC_CLOCKEVENTS and LEGACY_TIMER_TICK from an architecture now and decide at runtime between the two. For the clockevents arch-support.txt file, this means that additional architectures are marked as TODO when they have at least one machine that still uses LEGACY_TIMER_TICK, rather than being marked 'ok' when at least one machine has been converted. This means that both m68k and arm (for riscpc) revert to TODO. At this point, we could just always enable CONFIG_GENERIC_CLOCKEVENTS rather than leaving it off when not needed. I built an m68k defconfig kernel (using gcc-10.1.0) and found that this would add around 5.5KB in kernel image size: text data bss dec hex filename 3861936 1092236 196656 5150828 4e986c obj-m68k/vmlinux-no-clockevent 3866201 1093832 196184 5156217 4ead79 obj-m68k/vmlinux-clockevent On Arm (MACH_RPC), that difference appears to be twice as large, around 11KB on top of an 6MB vmlinux. Reviewed-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Tested-by: NGeert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 09 10月, 2020 1 次提交
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由 YiFei Zhu 提交于
In order to make adding configurable features into seccomp easier, it's better to have the options at one single location, considering especially that the bulk of seccomp code is arch-independent. An quick look also show that many SECCOMP descriptions are outdated; they talk about /proc rather than prctl. As a result of moving the config option and keeping it default on, architectures arm, arm64, csky, riscv, sh, and xtensa did not have SECCOMP on by default prior to this and SECCOMP will be default in this change. Architectures microblaze, mips, powerpc, s390, sh, and sparc have an outdated depend on PROC_FS and this dependency is removed in this change. Suggested-by: NJann Horn <jannh@google.com> Link: https://lore.kernel.org/lkml/CAG48ez1YWz9cnp08UZgeieYRhHdqh-ch7aNwc4JRBnGyrmgfMg@mail.gmail.com/Signed-off-by: NYiFei Zhu <yifeifz2@illinois.edu> [kees: added HAVE_ARCH_SECCOMP help text, tweaked wording] Signed-off-by: NKees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/9ede6ef35c847e58d61e476c6a39540520066613.1600951211.git.yifeifz2@illinois.edu
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- 05 10月, 2020 2 次提交
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由 Christoph Hellwig 提交于
Stop providing the possibility to override the address space using set_fs() now that there is no need for that any more. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Christoph Hellwig 提交于
This reverts commit adccfb1a. Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 03 10月, 2020 3 次提交
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由 Atish Patra 提交于
This patch adds EFI runtime service support for RISC-V. Signed-off-by: NAtish Patra <atish.patra@wdc.com> [ardb: - Remove the page check] Signed-off-by: NArd Biesheuvel <ardb@kernel.org> Acked-by: NArd Biesheuvel <ardb@kernel.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Atish Patra 提交于
Add a RISC-V architecture specific stub code that actually copies the actual kernel image to a valid address and jump to it after boot services are terminated. Enable UEFI related kernel configs as well for RISC-V. Signed-off-by: NAtish Patra <atish.patra@wdc.com> Link: https://lore.kernel.org/r/20200421033336.9663-4-atish.patra@wdc.com [ardb: - move hartid fetch into check_platform_features() - use image_size not reserve_size - select ISA_C - do not use dram_base] Signed-off-by: NArd Biesheuvel <ardb@kernel.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Atish Patra 提交于
UEFI uses early IO or memory mappings for runtime services before normal ioremap() is usable. Add the necessary fixmap bindings and pmd mappings for generic ioremap support to work. Signed-off-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 20 9月, 2020 1 次提交
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由 Palmer Dabbelt 提交于
The K210 doesn't implement rdtime in M-mode, and since that's where Linux runs in the NOMMU systems that means we can't use rdtime. The K210 is the only system that anyone is currently running NOMMU or M-mode on, so here we're just inlining the timer read directly. This also adds the CLINT driver as an !MMU dependency, as it's currently the only timer driver availiable for these systems and without it we get a build failure for some configurations. Tested-by: NDamien Le Moal <damien.lemoal@wdc.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 09 9月, 2020 1 次提交
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由 Christoph Hellwig 提交于
Add a CONFIG_SET_FS option that is selected by architecturess that implement set_fs, which is all of them initially. If the option is not set stubs for routines related to overriding the address space are provided so that architectures can start to opt out of providing set_fs. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NKees Cook <keescook@chromium.org> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 21 8月, 2020 1 次提交
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由 Anup Patel 提交于
Right now the RISC-V timer driver is convoluted to support: 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for clocksource and SBI timer calls for clockevent device. 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO counter register for clocksource and CLINT MMIO compare register for clockevent device. We now have a separate CLINT timer driver which also provide CLINT based IPI operations so let's remove CLINT MMIO related code from arch/riscv directory and RISC-V timer driver. Signed-off-by: NAnup Patel <anup.patel@wdc.com> Tested-by: NEmil Renner Berhing <kernel@esmil.dk> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 31 7月, 2020 7 次提交
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由 Emil Renner Berthing 提交于
This allows the pgtable tests to be built. Signed-off-by: NEmil Renner Berthing <kernel@esmil.dk> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Emil Renner Berthing 提交于
Add jump-label implementation based on the ARM64 version and add CONFIG_JUMP_LABEL=y to the defconfigs. Signed-off-by: NEmil Renner Berthing <kernel@esmil.dk> Reviewed-by: NBjörn Töpel <bjorn.topel@gmail.com> Tested-by: NBjörn Töpel <bjorn.topel@gmail.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Guo Ren 提交于
The -fstack-protector & -fstack-protector-strong features are from gcc. The patch only add basic kernel support to stack-protector feature and some arch could have its own solution such as ARM64_PTR_AUTH. After enabling STACKPROTECTOR and STACKPROTECTOR_STRONG, the .text size is expanded from 0x7de066 to 0x81fb32 (only 5%) to add canary checking code. Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Reviewed-by: NKees Cook <keescook@chromium.org> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Tobias Klauser 提交于
Tested using syzkaller in QEMU's riscv64 virt machine. Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Tobias Klauser 提交于
Add ARCH_HAS_KCOV and HAVE_GCC_PLUGINS to the riscv Kconfig. Also disable instrumentation of some early boot code and vdso. Boot-tested on QEMU's riscv64 virt machine. Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Acked-by: NDmitry Vyukov <dvyukov@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Greentime Hu 提交于
This patch implements and enables context tracking for riscv (which is a prerequisite for CONFIG_NO_HZ_FULL support) It adds checking for previous state in the entry that all excepttions and interrupts goes to and calls context_tracking_user_exit() if it comes from user space. It also calls context_tracking_user_enter() if it will return to user space before restore_all. This patch is tested with the dynticks-testing testcase in qemu-system-riscv64 virt machine and Unleashed board. git://git.kernel.org/pub/scm/linux/kernel/git/frederic/dynticks-testing.git We can see the log here. The tick got mostly stopped during the execution of the user loop. _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | <idle>-0 [001] d..2 604.183512: sched_switch: prev_comm=swapper/1 prev_pid=0 prev_prio=120 prev_state=R ==> next_comm=taskset next_pid=273 next_prio=120 user_loop-273 [001] d.h1 604.184788: hrtimer_expire_entry: hrtimer=000000002eda5fab function=tick_sched_timer now=604176096300 user_loop-273 [001] d.s2 604.184897: workqueue_queue_work: work struct=00000000383402c2 function=vmstat_update workqueue=00000000f36d35d4 req_cpu=1 cpu=1 user_loop-273 [001] dns2 604.185039: tick_stop: success=0 dependency=SCHED user_loop-273 [001] dn.1 604.185103: tick_stop: success=0 dependency=SCHED user_loop-273 [001] d..2 604.185154: sched_switch: prev_comm=taskset prev_pid=273 prev_prio=120 prev_state=R+ ==> next_comm=kworker/1:1 next_pid=46 next_prio=120 <...>-46 [001] .... 604.185194: workqueue_execute_start: work struct 00000000383402c2: function vmstat_update <...>-46 [001] d..2 604.185266: sched_switch: prev_comm=kworker/1:1 prev_pid=46 prev_prio=120 prev_state=I ==> next_comm=taskset next_pid=273 next_prio=120 user_loop-273 [001] d.h1 604.188812: hrtimer_expire_entry: hrtimer=000000002eda5fab function=tick_sched_timer now=604180133400 user_loop-273 [001] d..1 604.189050: tick_stop: success=1 dependency=NONE user_loop-273 [001] d..2 614.251386: sched_switch: prev_comm=user_loop prev_pid=273 prev_prio=120 prev_state=X ==> next_comm=swapper/1 next_pid=0 next_prio=120 <idle>-0 [001] d..2 614.315391: sched_switch: prev_comm=swapper/1 prev_pid=0 prev_prio=120 prev_state=R ==> next_comm=taskset next_pid=276 next_prio=120 Signed-off-by: NGreentime Hu <greentime.hu@sifive.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Guo Ren 提交于
Lockdep is needed by proving the spinlocks and rwlocks. To suupport it, we need fixup TRACE_IRQFLAGS_SUPPORT in kernel/entry.S. This patch follow Documentation/irqflags-tracing.txt. Signed-off-by: NGuo Ren <guoren@linux.alibaba.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 10 7月, 2020 1 次提交
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由 Vincent Chen 提交于
Due to lack of hardware breakpoint support, the kernel option CONFIG_STRICT_KERNEL_RWX should be disabled when using KGDB. However, CONFIG_STRICT_KERNEL_RWX is always enabled now. Therefore, select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT to enable CONFIG_STRICT_KERNEL_RWX by default, and then select ARCH_OPTIONAL_KERNEL_RWX to enable the Kconfig prompt of CONFIG_STRICT_KERNEL_RWX so that users can turn it off. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 05 7月, 2020 1 次提交
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由 Christian Brauner 提交于
All architectures support copy_thread_tls() now, so remove the legacy copy_thread() function and the HAVE_COPY_THREAD_TLS config option. Everyone uses the same process creation calling convention based on copy_thread_tls() and struct kernel_clone_args. This will make it easier to maintain the core process creation code under kernel/, simplifies the callpaths and makes the identical for all architectures. Cc: linux-arch@vger.kernel.org Acked-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: NGreentime Hu <green.hu@gmail.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: NKees Cook <keescook@chromium.org> Signed-off-by: NChristian Brauner <christian.brauner@ubuntu.com>
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- 30 6月, 2020 1 次提交
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由 Chenxi Mao 提交于
Select ARCH_SUPPORTS_ATOMIC_RMW by default to enable osqlocks. Signed-off-by: NChenxi Mao <maochenxi@eswin.com> [Palmer: commit text] Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 11 6月, 2020 1 次提交
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由 Vincent Chen 提交于
Even if RISC-V has supported the vDSO feature, the latency of the functions for obtaining the system time is still expensive. It is because these functions still trigger a corresponding system call in the process, which slows down the response time. If we want to remove the system call to reduce the latency, the kernel should have the ability to output the system clock information to userspace. This patch introduces the vDSO common flow to enable the kernel to achieve the above feature and uses "rdtime" instruction to obtain the current time in the user space. Under this condition, the latency cost by the ecall from U-mode to S-mode can be eliminated. After applying this patch, the latency of gettimeofday() measured on the HiFive unleashed board can be reduced by %61. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 10 6月, 2020 3 次提交
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由 Anup Patel 提交于
The RISC-V per-HART local interrupt controller driver is mandatory for all RISC-V system (with/without MMU) hence we force select it for CONFIG_RISCV (just like RISCV_TIMER). Signed-off-by: NAnup Patel <anup.patel@wdc.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Anup Patel 提交于
The RISC-V per-HART local interrupt controller manages software interrupts, timer interrupts, external interrupts (which are routed via the platform level interrupt controller) and other per-HART local interrupts. We add a driver for the RISC-V local interrupt controller, which eventually replaces the RISC-V architecture code, allowing for a better split between arch code and drivers. The driver is compliant with RISC-V Hart-Level Interrupt Controller DT bindings located at: Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt Co-developed-by: NPalmer Dabbelt <palmer@dabbelt.com> Signed-off-by: NAnup Patel <anup.patel@wdc.com> [Palmer: Cleaned up warnings] Signed-off-by: NPalmer Dabbelt <palmer@dabbelt.com>
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由 Palmer Dabbelt 提交于
Like patch b1b3f49c ("ARM: config: sort select statements alphanumerically") , we sort all our select statements alphanumerically by using the perl script in patch b1b3f49c as above. As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. Suggested-by: NZong Li <zong.li@sifive.com> [Palmer: Re-ran the script, as there were predictably a bunch of conflicts] Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 04 6月, 2020 2 次提交
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由 Zong Li 提交于
Support DEBUG_WX to check whether there are mapping with write and execute permission at the same time. [akpm@linux-foundation.org: replace macros with C] Signed-off-by: NZong Li <zong.li@sifive.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Link: http://lkml.kernel.org/r/282e266311bced080bc6f7c255b92f87c1eb65d6.1587455584.git.zong.li@sifive.comSigned-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Mike Rapoport 提交于
CONFIG_HAVE_MEMBLOCK_NODE_MAP is used to differentiate initialization of nodes and zones structures between the systems that have region to node mapping in memblock and those that don't. Currently all the NUMA architectures enable this option and for the non-NUMA systems we can presume that all the memory belongs to node 0 and therefore the compile time configuration option is not required. The remaining few architectures that use DISCONTIGMEM without NUMA are easily updated to use memblock_add_node() instead of memblock_add() and thus have proper correspondence of memblock regions to NUMA nodes. Still, free_area_init_node() must have a backward compatible version because its semantics with and without CONFIG_HAVE_MEMBLOCK_NODE_MAP is different. Once all the architectures will use the new semantics, the entire compatibility layer can be dropped. To avoid addition of extra run time memory to store node id for architectures that keep memblock but have only a single node, the node id field of the memblock_region is guarded by CONFIG_NEED_MULTIPLE_NODES and the corresponding accessors presume that in those cases it is always 0. Signed-off-by: NMike Rapoport <rppt@linux.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Tested-by: Hoan Tran <hoan@os.amperecomputing.com> [arm64] Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64] Cc: Baoquan He <bhe@redhat.com> Cc: Brian Cain <bcain@codeaurora.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greentime Hu <green.hu@gmail.com> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Guo Ren <guoren@kernel.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Mark Salter <msalter@redhat.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michal Hocko <mhocko@kernel.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Nick Hu <nickhu@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Richard Weinberger <richard@nod.at> Cc: Rich Felker <dalias@libc.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Stafford Horne <shorne@gmail.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200412194859.12663-4-rppt@kernel.orgSigned-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 19 5月, 2020 3 次提交
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由 Vincent Chen 提交于
The $status, $badaddr, and $cause registers belong to the thread context, so KGDB can obtain their contents from pt_regs in each trap. However, the sequential number of these registers in the gdb register list is far from the general-purpose registers. If riscv port uses the existing method to report these three registers, many trivial registers with sequence numbers in the middle of them will also be packaged to the reply packets. To solve this problem, the riscv port wants to introduce the GDB target description mechanism to customize the reported register list. By the list, the KGDB can ignore the intermediate registers and just reports the general-purpose registers and these three system registers. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Vincent Chen 提交于
The skeleton of RISC-V KGDB port. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Palmer Dabbelt 提交于
Some systems don't provide a useful device tree to the kernel on boot. Chasing around bootloaders for these systems is a headache, so instead le't's just keep a device tree table in the kernel, keyed by the SOC's unique identifier, that contains the relevant DTB. This is only implemented for M mode right now. While we could implement this via the SBI calls that allow access to these identifiers, we don't have any systems that need this right now. Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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- 13 5月, 2020 2 次提交
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由 Kefeng Wang 提交于
HUGETLBFS only used when MMU enabled, add the dependency. Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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由 Kefeng Wang 提交于
DEBUG_VIRTUAL should only used when MMU enabled, add the dependence. Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
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