Skip to content

K
Kernel

openeuler / Kernel
1 年多 前同步成功

通知 8
Star 0
Fork 0
K
Kernel
切换分支/标签
  1. 18 5月, 2015 1 次提交
  3. 13 5月, 2015 2 次提交
  5. 12 5月, 2015 1 次提交
  7. 08 5月, 2015 1 次提交
  9. 05 5月, 2015 2 次提交
  11. 04 5月, 2015 1 次提交
    • D
      drm/vblank: Fixup and document timestamp update/read barriers · 99264a61
      由 Daniel Vetter 提交于 
      This was a bit too much cargo-culted, so lets make it solid:
- vblank->count doesn't need to be an atomic, writes are always done
  under the protection of dev->vblank_time_lock. Switch to an unsigned
  long instead and update comments. Note that atomic_read is just a
  normal read of a volatile variable, so no need to audit all the
  read-side access specifically.

- The barriers for the vblank counter seqlock weren't complete: The
  read-side was missing the first barrier between the counter read and
  the timestamp read, it only had a barrier between the ts and the
  counter read. We need both.

- Barriers weren't properly documented. Since barriers only work if
  you have them on boths sides of the transaction it's prudent to
  reference where the other side is. To avoid duplicating the
  write-side comment 3 times extract a little store_vblank() helper.
  In that helper also assert that we do indeed hold
  dev->vblank_time_lock, since in some cases the lock is acquired a
  few functions up in the callchain.

Spotted while reviewing a patch from Chris Wilson to add a fastpath to
the vblank_wait ioctl.

v2: Add comment to better explain how store_vblank works, suggested by
Chris.

v3: Peter noticed that as-is the 2nd smp_wmb is redundant with the
implicit barrier in the spin_unlock. But that can only be proven by
auditing all callers and my point in extracting this little helper was
to localize all the locking into just one place. Hence I think that
additional optimization is too risky.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Peter Hurley <peter@hurleysoftware.com>
Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
Reviewed-and-tested-by: NMario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      99264a61
  13. 14 4月, 2015 1 次提交
  15. 13 4月, 2015 2 次提交
  17. 12 4月, 2015 1 次提交
  19. 08 4月, 2015 1 次提交
  21. 03 4月, 2015 2 次提交
    • P
      drm/panel: Add display timing support · 2938931f
      由 Philipp Zabel 提交于 
      Many panel data sheets, additionally to typical values, list allowed
ranges for timings such as hsync/vsync lengths, porches, and the pixel
clock rate. These can be stored in a struct display_timing, to be used
by an encoder mode_fixup callback to clamp user provided timing values
or to validate workarounds for clock source limitations.

This patch adds a new drm_panel_funcs callback that returns the panel's
available display_timing entries.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>
      2938931f
    • T
      drm/atomic: Add helpers for state-subclassing drivers · f5e7840b
      由 Thierry Reding 提交于 
      Drivers that subclass CRTC, plane or connector state need to carefully
duplicate the code that the atomic helpers have. This is bound to cause
breakage eventually because it requires auditing all drivers and update
them when code is added to the helpers.

In order to avoid that, implement new helpers that perform the required
steps when copying and destroying state. These new helpers are exported
so that state-subclassing drivers can use them. The default helpers are
implemented using them as well, providing a single location that needs
to be changed when adding to base atomic states.
Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NThierry Reding <treding@nvidia.com>
      f5e7840b
  23. 01 4月, 2015 1 次提交
  25. 31 3月, 2015 1 次提交
  27. 27 3月, 2015 2 次提交
  29. 24 3月, 2015 1 次提交
  31. 20 3月, 2015 1 次提交
  33. 18 3月, 2015 1 次提交
  35. 12 3月, 2015 3 次提交
  37. 10 3月, 2015 7 次提交
  39. 05 3月, 2015 3 次提交
  41. 24 2月, 2015 3 次提交
  43. 23 2月, 2015 2 次提交