For uvd_4/5/6, amdgpu driver will only power on them when
there are jobs assigned to decode/enc rings.uvd_4/5/6 dpm was broken
since amdgpu_dpm_set_powergating_by_smu only covers gfx block.

The change would add more IP block support in amdgpu_dpm_set_powergating_by_smu
For GFX/UVD/VCN/VCE, if the new SMU driver is supported, invoke new
power gate helper function smu_dpm_set_power_gate, otherwise, fallback to
legacy powerplay helper function pp_set_powergating_by_smu. For other IP blocks
always invoke legacy powerplay helper function.
Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: NTianci Yin <tianci.yin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

the od_settings is asic related data, so move it to asic file.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

the set default od_setting is asic related function,
so move thic code to vega20_ppt file.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

the smu->mutex is internal lock resource in sw-smu, some functions will use
it at the same time, so it maybe will cause deadlock issue.
this patch fix this issue in smu_force_performance_level function.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

when dc update clocks via smu, smu needs to know how many
displays active. this interface is for dc notify number
of active displays to smu.
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

remove smu callback: get_mclk, get_sclk.
because the function smu_get_dpm_freq_range has the same function.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

the smu mutex lock is unnecessary in smu hw init.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add sw-CTF support for navi10
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

because this callback is not asic related function, so move it to top
code level to support more asic (eg: navi10)
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This part of code is asic unrelated and moves to top code level.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add this function to get dpm clock information.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add this helper function to get dpm clk information.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add this helper function to get dpm clk information (min, max);
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

this function can help driver to get ppclk informations
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

SMU requires to interact with RLC when disable all features,
so RLC shouldn't be disabled ahead of SMU.
Signed-off-by: NJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch sets dpm_enabled flag but don't enable vcn dpm, because vcn dpm
doesn't work so far and we needs to enable the sysfs interfaces.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Acked-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This dpm_enabled flag will be recognized as the VCN DPM enabled as well. In fact
VCN/DCN DPM on Navi10 is not good so far, so we cannot enable it for now.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Acked-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Table id may be different for each asic, so it's good to use this as the input
for common interface.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Nothing was using it.  Just replace with smu_update_table
which is what everything was using via a wrapper anyway.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch introduces new smu feature type, it's to handle the different feature
mask defines for each asic with the same smu ip.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Navi10 will use sw smu driver for dynamic power managment,
while vega20 could also use sw smu driver when amdgpu_dpm is
set to 2
Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1. check the firmware version when enabling gfxoff
2. overwrite the pptable to make sure gfxoff is really
enabled on navi10
Signed-off-by: NKenneth Feng <kenneth.feng@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1.change function return value type: from "unallowed" to "allowed"
2.replace feature mask number with feature macro, the code will clear.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

remove duplicate code (un-used) in smu
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1.add smc_firmware_header_v2_1 hfirmware support, support more pptable in smc firmware.
2.optimization current pptable load framework.
3.rename read_pptable_from_vbios with setup_pptable.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

For gfx 10, rlc firmware loading relies on smu firmware is loaded firstly, so in
direct type, it has to load smc ucode here before rlc. And meanwhile, the smu
initialization has to move after rlc, otherwise, smu message will get failure
during the handshake with rlc and smu.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

In navi10, we need read the pp_table_id from bootup value, then decide whether
use load the soft pptable.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Naiv10 also uses smu v11 functions.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Fix code error to support value < 0 or > 1.
Signed-off-by: NChengming Gui <Jack.Gui@amd.com>
Reviewed-by: NHawking Zhang <hawking.zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add pm_enabled to control the dpm off/on.
v2: Directly return 0 to replace return ret and merge some check code.
Signed-off-by: NChengming Gui <Jack.Gui@amd.com>
Reviewed-by: NHawking Zhang <hawking.zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

smu_get_clk_info_from_vbios() was called repeatedly. It
seems a merge error.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

There is already sw smu check on IP block adding.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

add this helper function to get smc version.
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

There is a typo so the code unlocks twice instead of taking the lock and
then releasing it.

Fixes: f14a323d ("drm/amd/powerplay: implement update enabled feature state to smc for smu11")
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

in fact, the firmware need 2 parameter: 1.table_id, 2.XferArg
so change the function interface to match the firmware code
Signed-off-by: NKevin Wang <kevin1.wang@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We already unlocked a few lines earlier so this code unlocks twice on
the success path.

Fixes: 289921b0 ("drm/amd/powerplay: implement sysfs of pp_table for smu11 (v2)")
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Raven series doesn't support sw smu so far, so we have to add checking to
confirm it return false while the asic is raven.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NLikun Gao <Likun.Gao@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Move pp_feature from the struct of amd_powerplay to amdgpu_device.
Add pp_feature limit for overdrive interface.

v2: put pp_feature into struct amdgpu_pm.
v3: merge feature_mask with pp_feature.
Signed-off-by: NLikun Gao <Likun.Gao@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Suggested-by: NAlex Deucher <alexander.deucher@amd.com>
Suggested-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch moves setting allowed mask and feature enabling together to refine
the programming sequence.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

PCIE parameters should be override to fix the conflict between the ASIC
capabilities and the system capabilities.
Signed-off-by: NLikun Gao <Likun.Gao@amd.com>
Reviewed-by: NGui Chengming <Jack.Gui@amd.com>
Reviewed-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>