- 19 1月, 2013 3 次提交
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由 Jon Hunter 提交于
During the migration to the common clock framework, calls to the functions omap2xxx_clkt_vps_late_init() were not preserved for OMAP2420 and OMAP2430. This causes the variables "sys_ck_rate" and "curr_prcm_set" to be uninitialised on boot. On reboot, this causes the following error message to be displayed because the appropriate MPU clock frequency (derived from sys_ck_rate) cannot be found. "Could not set MPU rate to 4294MHz" Fix this by adding back calls to omap2xxx_clkt_vps_late_init() in the OMAP2420 and OMAP2430 clock initialisation code. Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: dropped the duplicated call to omap2xxx_clkt_vps_check_bootloader_rates() after consultation with Jon; updated patch description] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Peter Ujfalusi 提交于
McPDM need to be configured to NO_IDLE mode when it is in used otherwise vital clocks will be gated which results 'slow motion' audio playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: copy patch description into hwmod data comments] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Peter Ujfalusi 提交于
To avoid issues with audio caused by non locked ABE DPLL we should make sure it is locked in all OMAP4 revisions. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: cleaned up patch description] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 08 1月, 2013 1 次提交
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由 Pantelis Antoniou 提交于
The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START This led to having a resource list of 100s of IRQs. Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add AM33XX HWMOD data) that probably had some search and replace updates done for the patch for sparse irq support. Signed-off-by: NPantelis Antoniou <panto@antoniou-consulting.com> Acked-by: NPaul Walmsley <paul@pwsan.com> [tony@atomide.com: updated wit information about the breaking commit] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 1月, 2013 1 次提交
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由 Greg Kroah-Hartman 提交于
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 1月, 2013 5 次提交
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由 Paul Walmsley 提交于
On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
The ETM/ETB drivers for OMAP3, enable the emu_src_ck clock in order to access the ETM/ETB hardware. The emu_src_ck should enable the EMU clock domain so that the ETM/ETB hardware is accessible. However, currently when enabling the emu_src_ck the EMU clock domain is not being enabled and so the ETM/ETB drivers are failing. Add enable/disable clock functions to enable the EMU clock domain when enabling the emu_src_ck. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Ivan Khoronzhuk 提交于
To read reset sources registers we have to use PRM_DEVICE_INST Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Nishanth Menon 提交于
RSTTIME is offset 0x8 and RSTST is offset 0x04 for OMAP4430 and OMAP4460. Signed-off-by: NNishanth Menon <nm@ti.com> [ivan.khoronzhuk@ti.com: ported from k3.4] Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Ivan Khoronzhuk 提交于
In the map for reset sources register we use defines intended for using with PRM_RSTCTRL register. So fix it. Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 02 1月, 2013 1 次提交
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由 Paul Walmsley 提交于
Commit 70384a6a ("ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module") adds two new sparse warnings: arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2518:30: warning: symbol 'am33xx_mdio_addr_space' was not declared. Should it be static? arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2526:26: warning: symbol 'am33xx_cpgmac0__mdio' was not declared. Should it be static? Fix by marking the two new records as static. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Richard Cochran <richardcochran@gmail.com> Cc: David S. Miller <davem@davemloft.net> Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
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- 21 12月, 2012 3 次提交
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由 Tony Lindgren 提交于
Commit 787314c3 ("Merge tag 'iommu-updates-v3.8' of git://git./linux/kernel/git/joro/iommu") did not account for the changed header location. The headers were made local to mach-omap2 as they are specific to omap2+ only, and we wanted to get most of the #include <plat/*.h> headers fixed up anyways for the ARM multiplatform support. We attempted to avoid this kind of merge conflict early on by setting up a minimal git branch shared by the arm-soc tree and the iommu tree, but looks like we still hit a merge issue there as the branches got merged as various topic branches. Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Peter Ujfalusi 提交于
prom_add_property() has been renamed to of_add_property() This patch fixes the following comilation error: arch/arm/mach-omap2/timer.c: In function ‘omap_get_timer_dt’: arch/arm/mach-omap2/timer.c:178:3: error: implicit declaration of function ‘prom_add_property’ [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[1]: *** [arch/arm/mach-omap2/timer.o] Error 1 make[1]: *** Waiting for unfinished jobs.... Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Vaibhav Bedia 提交于
Merge commit 752451f0 ("Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux") resulted in a build breakage for OMAP arch/arm/mach-omap2/i2c.c: In function 'omap_pm_set_max_mpu_wakeup_lat_compat': arch/arm/mach-omap2/i2c.c:130:2: error: implicit declaration of function 'omap_pm_set_max_mpu_wakeup_lat' make[1]: *** [arch/arm/mach-omap2/i2c.o] Error 1 Fix this by including the appropriate header file with the function prototype. Reported-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 18 12月, 2012 7 次提交
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由 Julia Lawall 提交于
Just use WARN_ON rather than an if containing only WARN_ON(1). A simplified version of the semantic patch that makes this transformation is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ - if (e) WARN_ON(1); + WARN_ON(e); // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 YOSHIFUJI Hideaki 提交于
Fix a typo - replace regist with register. Signed-off-by: NYOSHIFUJI Hideaki <yoshfuji@linux-ipv6.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
Commit 2ac29a14 (ARM: PMU: fix runtime PM enable) moved the call to pm_runtime_enable() from the OMAP2+ PMU code into the ARM PERF core code. However, header for pm_runtime which should have been removed from the OMAP2+ PMU code was not. It is no longer necessary to include this header in the OMAP2+ PMU code and so remove it. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wei Yongjun 提交于
Remove duplicated include. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
To facilitate upcoming cleanup in twl stack. No functional change. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
The cpu_is_omap macros are now local to arch/arm/mach-omap2 in soc.h and plat/cpu.h can finally be dropped for omap2+. Thanks everybody for help with fixing the drivers. Note that we can now also remove the unused plat/cpu.h from smartreflex.c and isp.c as they will cause compile errors with ARCH_MULTIPLATFORM enabled. Cc: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: NJean Pihet <jean.pihet@newoldbits.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like we missed plat-omap/fb.c for cpu_is_omap usage mach-omap2. This is the last user of cpu_is_omap, so let's quickly fix it up so we can finally remove plat/cpu.h for omap2lus. We want to limit cpu_is_omap macro usage to mach-omap2 only so we can make plat/cpu.h private. After this we can finally drop plat/cpu.h for omap2+. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 12月, 2012 2 次提交
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由 Pali Rohár 提交于
This is needed to make the battery monitor actually work on Nokia N900. Signed-off-by: NPali Rohár <pali.rohar@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAnton Vorontsov <anton.vorontsov@linaro.org>
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由 Javier Martinez Canillas 提交于
commit 966458f8 OMAP: remove vram allocator Removed the OMAP specific vram allocator but OMAP2 common was still trying to use it and this lead to the following build error: CC arch/arm/mach-omap2/common.o arch/arm/mach-omap2/common.c:19:23: fatal error: plat/vram.h: No such file or directory compilation terminated. make[1]: *** [arch/arm/mach-omap2/common.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 12月, 2012 16 次提交
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由 Paul Walmsley 提交于
Fix the following sparse warnings in the OMAP3/4 CPUIdle code: arch/arm/mach-omap2/cpuidle34xx.c:272:1: warning: symbol 'omap3_idle_dev' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle34xx.c:274:23: warning: symbol 'omap3_idle_driver' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle44xx.c:164:1: warning: symbol 'omap4_idle_dev' was not declared. Should it be static? arch/arm/mach-omap2/cpuidle44xx.c:166:23: warning: symbol 'omap4_idle_driver' was not declared. Should it be static? Also fix the following checkpatch warnings: WARNING: please, no space before tabs #44: FILE: arch/arm/mach-omap2/cpuidle34xx.c:105: +^I.name = ^I"omap3_idle",$ WARNING: please, no space before tabs #45: FILE: arch/arm/mach-omap2/cpuidle34xx.c:106: +^I.owner = ^ITHIS_MODULE,$ ERROR: code indent should use tabs where possible #211: FILE: arch/arm/mach-omap2/cpuidle44xx.c:74: + /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */$ Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Paul Walmsley 提交于
Booting OMAP4460 Pandaboard ES with a recent u-boot results in this warning: WARNING: at arch/arm/mach-omap2/dpll3xxx.c:427 omap3_noncore_dpll_enable+0xf4/0x110() The OMAP4 DPLL parent clock names only listed the reference clocks, not the bypass clocks. Fix by adding the bypass clocks to the DPLL parent lists. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@linaro.org>
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由 Paul Walmsley 提交于
The OMAP4 clock divider "div_iva_hs_clk" is listed in the clock data as an OMAP HSDIVIDER, but it's actually a power-of-two divider. This causes a warning during boot on an OMAP4460 Pandaboard-ES with a recent u-boot: WARNING: at arch/arm/mach-omap2/clkt_clksel.c:143 omap2_clksel_recalc+0xf4/0x12c() clock: div_iva_hs_clk: could not find fieldval 0 for parent dpll_core_m5x2_ck Fix by converting the data for this clock to a power-of-two divider. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@linaro.org>
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由 Jon Hunter 提交于
Commit d043d87c (ARM: OMAP2+: clockdomain: bypass clockdomain handling when disabling unused clks) skips the decrementing of a clock-domains use count if the clocks use count is zero. However, for OMAP4 devices this is causing the EMU clock-domain to be stuck ON as the use count is not getting decremented correctly. The scenario that leads to this problem is described below ... omap_hwmod_setup_all --> _setup --> clkdm_hwmod_enable --> EMU clock domain usecount = 1 --> _enable_clocks --> clk_enable --> trace_clk_div_div usecount = 1 --> clkdm_hwmod_enable --> EMU clock domain usecount = 2 --> _idle --> _disable_clocks --> clk_disable --> trace_clk_div_div usecount = 0 --> clkdm_hwmod_disable --> skips decrement of EMU clock domain usecount because trace_clk_div_div is 0! --> EMU clock domain usecount = 2 --> clkdm_hwmod_disable --> EMU clock domain usecount = 1 Hence, due to the order that a clocks use count is decremented and the clock domain is disabled, it is possible that the clock domain can have a non-zero use count when the actual clock has a use count of 0. Therefore, we should only bypass the clock-domain handling when both the clock-domain and clock in the clock-domain have a use count of 0 and warn when the clock-domain has a zero use count and the clock has a non-zero use count. Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: fixed checkpatch warning] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
With the latest mainline u-boot bootloader (v2012.10), timers (5-8) in the ABE power domain are failing to turn-on. The timers never come out of the disabled state when setting the module-mode field to enable. The problem was exposed when u-boot was updated to NOT configure and lock the ABE DPLL on start-up. If the ABE DPLL is configured and locked by u-boot the problem does not occur. However, if the ABE DPLL is in the idle low-power bypass state and we attempt to enable a timer in the ABE power domain, it remains stuck in the disabled state. It appears to be a problem the timer interface clock as this comes from the ABE DPLL. If we place the ABE DPLL in the MN-bypass state and not the idle low-power state, then this problem is not seen. This problem only appears to occur on OMAP4460 and not OMAP4430. Workaround this problem by locking the ABE DPLL for OMAP4460 in the kernel on boot. By locking the ABE DPLL, when clocks from the ABE DPLL are not being requested the DPLL will transition into a low-power stop mode. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
On OMAP4 devices, the ABE DPLL has an internal 4X multiplier that can be enabled or disabled in addition to the standard configurable multiplier (M) for OMAP DPLLs. When configuring the ABE DPLL the 4X multiplier is accounted for by checking to see whether it is enabled or not. However, when calculating a new rate we only check to see if the rate can be achieved with the current setting for the 4X multiplier. Enhance the round_rate() function for such DPLLs to see if the rate can be achieved with the 4X multiplier if it cannot be achieved without the 4X multiplier. This change is necessary, because when using the 32kHz clock as the source clock for the ABE DPLL, the default DPLL frequency for the ABE DPLL cannot be achieved without enabling the 4X multiplier. When using the 32kHz clock as the source clock for the ABE DPLL and attempting to lock the DPLL to 98.304MHz (default frequency), it was found that the DPLL would fail to lock if the low-power mode for the DPLL was not enabled. From reviewing boot-loader settings that configure the ABE DPLL it was found that the low-power mode is enabled when using the 32kHz clock source, however, the documentation for OMAP does not state that this is a requirement. Therefore, introduce a new function for OMAP4 devices to see if low-power mode can be enabled when calculating a new rate to ensure the DPLL will lock. New variables for the last calculated 4X multiplier and low-power setting have been added to the dpll data structure as well as variables defining the bit mask for enabling these features via the DPLL's control_reg. It is possible that we could eliminate these bit masks from the dpll data structure as these bit masks are not unique to OMAP4, if it is preferred. The function omap3_noncore_program_dpll() has been updated to avoid passing the calculated values for the multiplier (M) and divider (N) as these are stored in the clk structure. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
Currently all OMAP4 non-core DPLLs use the same function table for configuring DPLLs. For these DPLLs, the function omap4_dpll_regm4xen_recalc() is used to recalculate the DPLL rate and the function omap4_dpll_regm4xen_round_rate() is used to calculate the closest rate to that requested. However, these omap4_dpll_regm4xen_xxx() functions are only applicable to the ABE DPLL and not the other non-core DPLLs. Therefore, add a new function table for non-core DPLLs that do not include the 4X-multiplier (M4X). Please note that using these omap4_dpll_regm4x_xxx() function works for the non-M4X DPLLs today because we only check to see if the 4X multiplier is enabled when calculating the rate. However, it is planned that the dpll functions will be enhanced to enable the 4X multiplier as necessary (in order to achieve the requested rate) and so calling these functions for non-M4X dplls will no longer work. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
Commit "ARM: dts: OMAP4: Update timer addresses" updated the device-tree names of the OMAP4 timers 5-7 because the default address for the timers was changed from the L3 address to the MPU private address. When booting with device-tree, this introduces a regression when attempting to set the parent clock of timers 5-7 to the sys_clk_div_ck. Therefore, update the clock aliases for timer 5-7 to reflect the updated device-tree name for the timers. Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply after the CCF conversion] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tony Lindgren 提交于
We need to move this file to allow ARM multiplatform configurations to build for omap2+. This can now be done as this file now only contains platform_data. cc: Russell King <linux@arm.linux.org.uk> cc: Alan Cox <alan@linux.intel.com> cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> cc: Govindraj.R <govindraj.raja@ti.com> cc: Kevin Hilman <khilman@ti.com> cc: linux-serial@vger.kernel.org Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Instead of using cpu_is_omap..() macros in the device driver we rely on information provided in the platform data. The only information we need is whether the USB Host module has a single ULPI bypass control bit for all ports or individual bypass control bits for each port. OMAP3 REV2.1 and earlier have the former. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NSamuel Ortiz <sameo@linux.intel.com> [tony@atomide.com: updated to remove plat/cpu.h] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
Ethernet is not currently working on the OMAP2420 H4 board. In commit f6049312 (ARM: OMAP: abstract debug card setup (smc, leds)) the function h4_init_smc91x() that initialised the ethernet controller was renamed to h4_init_debug() but was never called when initialising the board. Adding a call to h4_init_debug() fixes ethernet support, however, instead of using the legacy H4 code migrate the H4 to use the gpmc_smc91x_init() function instead and remove the legacy H4 code. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Oleg Matcovschi 提交于
OMAP_MODE_GPIO() macro verified only OMAP_MUX_MODE4. It is not correct for following platforms: 2430 - gpio mux mode 3 44xx - gpio mux mode 3 54xx - gpio mux mode 6 Patch reserves first 3 bits in partition flags for storing gpio mux mode in same format as stored in control pad register. Modified OMAP_MODE_GPIO() macro to handle all possible cases of gpio mux mode. Modified omap_mux_init() flags of omap34xx to include OMAP_MUX_GPIO_IN_MODE4. Signed-off-by: NOleg Matcovschi <oleg.matcovschi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
The i2c handling in tfp410 driver, which handles converting parallel RGB to DVI, was changed in 958f2717 (OMAPDSS: TFP410: pdata rewrite). The patch changed what value the driver considers as invalid/undefined. Before the patch, 0 was the invalid value, but as 0 is a valid bus number, the patch changed this to -1. However, the fact was missed that many board files do not define the bus number at all, thus it's left to 0. This causes the driver to fail to get the i2c bus, exiting from the driver's probe with an error, meaning that the DVI output does not work for those boards. This patch fixes the issue by changing the i2c_bus number field in the driver's platform data from u16 to int, and setting the bus number to -1 in the board files for the boards that did not define the bus. The exception is devkit8000, for which the bus is set to 1, which is the correct bus for that board. The bug exists in v3.5+ kernels. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Reported-by: NThomas Weber <thomas@tomweber.eu> Cc: Thomas Weber <thomas@tomweber.eu> Cc: <stable@vger.kernel.org> # v3.5+ Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Vaibhav Hiremath 提交于
Sparse generates the following warnings when compiling mach-omap2/timer.c. CHECK arch/arm/mach-omap2/timer.c arch/arm/mach-omap2/timer.c:193:13: warning: symbol 'omap_dmtimer_init' was not declared. Should it be static? arch/arm/mach-omap2/timer.c:213:12: warning: symbol 'omap_dm_timer_get_errata' was not declared. Should it be static? Add static to function declaration to fix warnings. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Jon Hunter 提交于
When compiling the kernel with configuration options ... # CONFIG_ARCH_OMAP2 is not set # CONFIG_ARCH_OMAP3 is not set # CONFIG_ARCH_OMAP4 is not set # CONFIG_SOC_OMAP5 is not set CONFIG_SOC_AM33XX=y ... the following build warning is seen. CC arch/arm/mach-omap2/timer.o arch/arm/mach-omap2/timer.c:395:19: warning: ‘omap2_sync32k_clocksource_init’ defined but not used [-Wunused-function] This issue was introduced by commit 6f80b3bb (ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER) where the omap2_sync32k_clocksource_init() is no longer referenced by the timer initialisation function for the AM335x device as it has no 32k-sync timer. Fix this by adding the "__maybe_unused" compiler directive to the omap2_sync32k_clocksource_init() function to indicate that this function may be used for certain configurations. Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Jon Hunter 提交于
In commit fa6d79d2 (ARM: OMAP: Add initialisation for the real-time counter), the function realtime_counter_init() was added. However, if the kernel configuration option CONFIG_SOC_OMAP5 is not selected then the following compiler warning is observed. CC arch/arm/mach-omap2/timer.o arch/arm/mach-omap2/timer.c:489:20: warning: ‘realtime_counter_init’ defined but not used [-Wunused-function] Commit fa6d79d2 also introduced the kernel configuration option CONFIG_SOC_HAS_REALTIME_COUNTER. If this option is not selected then the a stub function for realtime_counter_init() is defined. For non-OMAP5 devices, there is no realtime counter and so realtime_counter_init() function and stub function are not used for these devices. Therefore, fix this warning by only allowing the kernel configuration option CONFIG_SOC_HAS_REALTIME_COUNTER to be enabled for OMAP5 devices. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by Santosh Shilimkar <santosh.shilimkar@ti.com>
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- 04 12月, 2012 1 次提交
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由 Omar Ramirez Luna 提交于
This prevents hwmod _enable_clocks...omap2_dflt_clk_enable path from enabling modulemode inside CLKCTRL using its clk->enable_reg field. Instead is left to _omap4_enable_module though soc_ops, as the one in charge of this setting. According to comments received[1] for related patches the idea is to get rid of leaf clocks in future. So remove these two while at it. [1] http://lkml.org/lkml/2012/8/20/226Signed-off-by: NOmar Ramirez Luna <omar.luna@linaro.org> Tested-by: NOhad Ben-Cohen <ohad@wizery.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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