MTD_NAND is large and encloses much more than what the symbol is
actually used for: raw NAND. Clarify the symbol by naming it
MTD_RAW_NAND instead.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

This list is a mess, while some items should probably not be in the
raw/ sub-directory, others are definitely at the right place but not
with the right description. Write uniform titles and group IPs by
vendor.

NAND controllers will appear under the list named "Raw/parallel NAND
flash controllers" while the other drivers will appear under
"Misc". Software ECC engines will later be moved out of the raw/
directory.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The software Hamming ECC correction implementation is referred as
MTD_NAND_ECC which is too generic. Rename it
MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an
SMC quirk in the Hamming implementation as
MTD_NAND_ECC_SW_HAMMING_SMC.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

There is no point in having two distinct entries, merge them and
rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The symbol that is being used in the #if/#endif block is not the one
which is mentioned at the bottom.

Fixes: 93af53b8 ("nand: omap2: Remove horrible ifdefs to fix module probe")
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

nand_device embeds a nand_ecc_req object which contains the minimum
strength and step-size required by the NAND device.

Drop the chip->ecc_{strength,step}_ds fields and use
chip->base.eccreq.{strength,step_size} instead.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

The same information is provided by nanddev_ntargets().
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

The target size can now be returned by nanddev_get_targetsize(). Get
rid of the chip->chipsize field and use this helper instead.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Now that we inherit from nand_device, we can use
nand_device->memorg.bits_per_cell instead of having our own field at
the nand_chip level.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

nanddev_mtd_max_bad_blocks() is implemented by the generic NAND layer
and is already doing what we need. Reuse this function instead of
having our own implementation.

While at it, get rid of the ->max_bb_per_die and ->blocks_per_die
fields which are now unused.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

Looking at the field names it's hard to tell what ->data_buf, ->pagebuf
and ->pagebuf_bitflips are for. Clarify that by moving those fields
in a sub-struct named pagecache.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

We plan to move cache related fields to a pagecache struct in nand_chip
but some drivers access ->pagebuf directly to invalidate the cache
before they start using ->data_buf.

Let's provide an helper that returns a pointer to ->data_buf after
invalidating the cache.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

In order to use some of the nanddev_xxx() helpers, we need to
initialize the nand_device object embedded in nand_chip using
nanddev_init(). This requires implementing nand_ops.

We also drop useless mtd->xxx initialization when they're already taken
case of by nanddev_init().
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

If we want to use the generic NAND layer, we need to have the memorg
struct appropriately filled. Patch the detection code to fill this
struct.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The generic NAND layer provides abstraction of NAND devices no matter
the bus that is used to communicate with the chip. Basing the raw NAND
core on this generic layer should avoid duplication of common
operations, like iterating over all pages/blocks for MTD IO/erase
operations.

In order to re-use this layer, we must first inherit from nand_device
and then initialize the nand_device struct appropriately. This patch
is taking care of the former.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

Use the nand_to_mtd() helper to access chip->mtd as done everywhere
else.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

We just have to use nanddev_mtd_max_bad_blocks().
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

Will be used by the raw NAND framework.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

Some drivers in the raw NAND framework seems to need this helper, so
let's just add it instead of open-coding the logic.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

NAND datasheets usually give the maximum number of bad blocks per LUN
and this number can be used to help upper layers decide how much blocks
they should reserve for bad block handling.

Add a max_bad_eraseblocks_per_lun to the nand_memory_organization
struct and update the NAND_MEMORG() macro (and its users) accordingly.

We also provide a default mtd->_max_bad_blocks() implementation.
Signed-off-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de>

Specify the oob layout operation to avoid no oob scheme defined for
some nand flash.

Fixes: 8fae856c ("mtd: rawnand: meson: add support for Amlogic NAND flash controller")
Signed-off-by: NLiang Yang <liang.yang@amlogic.com>
Tested-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

of_match_device can return NULL if there is no matching device. Avoid
a potential NULL pointer dereference by checking for the return value
and passing the error upstream.
Signed-off-by: NAditya Pakki <pakki001@umn.edu>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The generic layout for BBT markers will most likely overlap with our
ECC bytes in the OOB, so move the BBT markers outside the OOB area.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The Ben Nanonote from Qi Hardware expects a specific OOB layout on its
NAND.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The boot ROM of the JZ4725B SoC expects a specific OOB layout on the
NAND, so we use it unconditionally in the ingenic-nand driver.

Also add the jz4725b-bch driver to support the JZ4725B-specific BCH
hardware.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Add support for probing the ingenic-nand driver on the JZ4740 SoC from
Ingenic, and the jz4740-ecc driver to support the JZ4740-specific
ECC hardware.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Use the 'ecc-engine' standard property instead of the custom
'ingenic,bch-controller' custom property, which is now deprecated.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The ingenic-nand driver uses an API provided by the jz4780-bch driver.
This makes it difficult to support other SoCs in the jz4780-bch driver.
To work around this, we separate the API functions from the SoC-specific
code, so that these API functions are SoC-agnostic.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The jz4780_bch_init name was confusing, as it suggested that its content
should be executed once at init time, whereas what the function really
does is reset the hardware for a new ECC operation.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The jz4780_nand driver will be modified to handle all the Ingenic
JZ47xx SoCs that the upstream Linux kernel supports (JZ4740, JZ4725B,
JZ4770, JZ4780), so it makes sense to rename it.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Use SPDX license notifiers instead of GPLv2 license text in the headers.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Reviewed-by: NBoris Brezillon <bbrezillon@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Before adding support for more SoCs and seeing the number of files for
these drivers grow, we move them to their own subfolder to keep it tidy.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The 'ingenic,bch-controller' property is now deprecated and the
'ecc-engine' property should be used instead.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The JZ4740 ECC hardware is not BCH but Reed-Solomon, so it makes more
sense to use the more generic ECC term.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Add compatible strings to probe the jz4780-nand and jz4780-bch drivers
from devicetree on the JZ4725B and JZ4740 SoCs from Ingenic.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

meson_nfc_dma_buffer_setup() is called with the "info" buffer which is
allocated a few lines before using kzalloc(). If
meson_nfc_dma_buffer_setup() fails we need to free the allocated "info"
buffer instead of only freeing it upon success.

Fixes: 8fae856c ("mtd: rawnand: meson: add support for Amlogic NAND flash controller")
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: NLiang Yang <liang.yang@amlogic.com>
Reviewed-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

kzalloc() can return NULL if memory could not be allocated. Check the
return value of the kzalloc() call in meson_nfc_read_buf() to make it
consistent with other memory allocations within the meson_nand driver.

Fixes: 8fae856c ("mtd: rawnand: meson: add support for Amlogic NAND flash controller")
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: NLiang Yang <liang.yang@amlogic.com>
Reviewed-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Adopt the SPDX license identifiers to ease license compliance
management.
Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

The sam9x60 board defines the CCFG_EBICSA register under SFR,
and not as a MATRIX register, as previous boards do.

NAND Flash I/Os are connected to D16–D23, thus
SFR_CCFG_EBICSA.NFD0_ON_D16 is set to 1.
Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Add compatibility string for the sam9x60 nand controller.
Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>