Add bindings for the I2C controller that can be found in the MediaTek
MT7621/7628/7688 SoCs.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

We are using sysfs functions directly, so we should include the header.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Probe function fails to recognize that upstream clock actually
doesn't yet exist because clock driver has not been initialized.
Actually try to go get the clock and test for its existence
before trying to set up a downstream clock based upon it.

This fixes a bug that causes the i2c driver not to work with
monolithic kernels.

Fixes: bebff81f ("i2c: bcm2835: Model Divider in CCF")
Signed-off-by: NAnnaliese McDermond <nh6z@nh6z.net>
Acked-by: NStefan Wahren <wahrenst@gmx.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If any of the clock code in the probe fails and returns, the IRQ
will not be freed.  Moving the IRQ request to last allows it to
be freed on any errors further up in the probe function.  devm_
calls can apparently not be used because there are some potential
race conditions that will arise.

Fixes: bebff81f ("i2c: bcm2835: Model Divider in CCF")
Signed-off-by: NAnnaliese McDermond <nh6z@nh6z.net>
Acked-by: NStefan Wahren <wahrenst@gmx.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Nobody (including me) noticed that these functions were exported but not
added to the header :/

Fixes: 7159dbda ("i2c: core: improve return value handling of i2c_new_device and i2c_new_dummy")
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: NKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The usage of BUG() macro is generally discouraged in kernel, unless
it's a problem that results in a physical damage or loss of data.
This patch removes unnecessary BUG() macros and replaces the rest
with warning.
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Tested-by: NDmitry Osipenko <digetx@gmail.com>
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add PCI ID for Intel Elkhart Lake PCH.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add SMBUS 2.0 Block Write-Block Read Process Call command support.
Signed-off-by: NAlexander Sverdlin <alexander.sverdlin@nokia.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

During probe, return the "get_irq" error value instead of -EINVAL which
allows the driver to be deferred probed if needed.
Fix also the case where of_irq_get() returns a negative value.
Note :
On failure of_irq_get() returns 0 or a negative value while
platform_get_irq() returns a negative value.

Fixes: aeb068c5 ("i2c: i2c-stm32f7: add driver")
Reviewed-by: NPierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: NFabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

match_string() returns the array index of a matching string.
Use it instead of the open-coded implementation.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NPali Rohár <pali.rohar@gmail.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add a match table to allow automatic probing of ACPI device
QCOM0220.  Ignore clock attainment errors.  Set default clock
frequency value.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The Qualcomm Geni I2C driver currently probes silently which can be
confusing when debugging potential issues.  Add a low level (INFO)
print when each I2C controller is successfully initially set-up.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Post suspend I2C registers have power on reset values. Before any
transfer initialize I2C registers to prevent I2C transfer timeout
and implement suspend and resume callbacks needed. Fix below errors
post suspend:

1) Tegra I2C transfer timeout during jetson tx2 resume:

[   27.520613] pca953x 1-0074: calling pca953x_resume+0x0/0x1b0 @ 2939, parent: i2c-1
[   27.633623] tegra-i2c 3160000.i2c: i2c transfer timed out
[   27.639162] pca953x 1-0074: Unable to sync registers 0x3-0x5. -110
[   27.645336] pca953x 1-0074: Failed to sync GPIO dir registers: -110
[   27.651596] PM: dpm_run_callback(): pca953x_resume+0x0/0x1b0 returns -110
[   27.658375] pca953x 1-0074: pca953x_resume+0x0/0x1b0 returned -110 after 127152 usecs
[   27.666194] PM: Device 1-0074 failed to resume: error -110

2) Tegra I2C transfer timeout error on jetson Xavier post resume.

Remove i2c bus lock-unlock calls in resume callback as i2c_mark_adapter_*
(suspended-resumed) help ensure i2c core calls from client are not
executed before i2c-tegra resume.
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Let's stick to coding style.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Update kerneldoc for i2c client flags because they increased over time.
Also, move them to a position where they can be more easily found.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Much better to read and understand.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Much better to read and understand. Naming for i2c_adapter is not
consistent (yet), so use the name which is also used in core code.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

It is not a struct device, so 'dev' is confusing. Use 'adap', the most
common name.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The i2c-ocore driver already has a polling mode interface.But it needs
a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
There is an erratum in FU540 chip that prevents interrupt driven i2c
transfers from working, and also the I2C controller's interrupt bit
cannot be cleared if set, due to this the existing i2c polling mode
interface added in mainline earlier doesn't work, and CPU stall's
infinitely, when-ever i2c transfer is initiated.

Ref:
	commit dd7dbf0e ("i2c: ocores: refactor setup for polling")

The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
FU540-COOO SoC.

The polling function identifies a SiFive device based on the device node
and enables the workaround.
Signed-off-by: NSagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Update device id table for Opencore's I2C master based re-implementation
used in FU540-c000 chipset on HiFive Unleashed platform.

Device ID's include Sifive, soc-specific device for chip specific tweaks
and sifive IP block specific device for generic programming model.
Signed-off-by: NSagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Reformatted compatibility strings to one valid combination on
each line.
Add FU540-C000 specific device tree bindings to already available
i2-ocores file. This device is available on
HiFive Unleashed Rev A00 board. Move interrupt under optional
property list as this can be optional.

The FU540-C000 SoC from sifive, has an Opencore's I2C block
reimplementation.

The DT compatibility string for this IP is present in HDL and available at.
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73Signed-off-by: NSagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

If the driver defers probe because of a missing clock, avoid outputting
an error message. The clock will show up eventually.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The commit

  19b07cb4 ("i2c: i801: Register optional lis3lv02d I2C device on Dell machines")

introduced a new check in order to enumerate some slave devices on Dell
machines. Though, it brings a regression on machines where DMI vendor is not set.

 BUG: kernel NULL pointer dereference, address: 0000000000000000
 #PF: supervisor read access in kernel mode
 #PF: error_code(0x0000) - not-present page
 PGD 0 P4D 0
 Oops: 0000 [#1] SMP PTI
 CPU: 8 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc4-next-20190613+ #317
 RIP: 0010:strcmp+0xc/0x20

To fix this crash, check if vendor field is present before accessing to it.

Fixes: 19b07cb4 ("i2c: i801: Register optional lis3lv02d I2C device on Dell machines")
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NPali Rohár <pali.rohar@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The IOP3xx has some elaborate code to directly slam the
GPIO lines multiplexed with I2C down low before enablement,
apparently a workaround for a hardware bug found in the
early chips.

After consulting the developer documentation for IOP80321
and IOP80331 I can clearly see that this may be useful for
IOP80321 family (mach-iop32x) but it is highly dubious for
any 80331 series or later chip: in these chips the lines
are not multiplexed for UARTs.

We convert the code to pass optional GPIO descriptors
and register these only on the 80321-based boards where
it makes sense, optionally obtain them in the driver and
use the gpiod_set_raw_value() to ascertain the line gets
driven low when needed.

The GPIO driver does not give the GPIO chip a reasonable
label so the patch also adds that so that these machine
descriptor tables can be used.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The S3C2410 does some funny dance around its pins:
- First try to call back to the platform to get and control
  some GPIO pins
- If this doesn't work, it tries to get a pin control handle
- If this doesn't work, it retrieves two GPIOs from the device
  tree node and does nothing with them

If we're gonna retrieve two GPIOs and do nothing with them, we
might as well do it using the GPIO descriptor API. When we use
the resource management API, the code gets smaller.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Model the I2C bus clock divider as a part of the Core Clock Framework.
Primarily this removes the clk_get_rate() call from each transfer.
This call causes problems for slave drivers that themselves have
internal clock components that are controlled by an I2C interface.
When the slave's internal clock component is prepared, the prepare
lock is obtained, and it makes calls to the I2C subsystem to
command the hardware to activate the clock.  In order to perform
the I2C transfer, this driver sets the divider, which requires
it to get the parent clock rate, which it does with clk_get_rate().
Unfortunately, this function will try to take the clock prepare
lock, which is already held by the slave's internal clock calls
creating a deadlock.

Modeling the divider in the CCF natively removes this dependency
and the divider value is only set upon changing the bus clock
frequency or changes in the parent clock that cascade down to this
divisor.  This obviates the need to set the divider with every
transfer and avoids the deadlock described above.  It also should
provide better clock debugging and save a few cycles on each
transfer due to not having to recalcuate the divider value.
Signed-off-by: NAnnaliese McDermond <nh6z@nh6z.net>
Acked-by: NStefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Fix checkpatch.pl WARNING for delay of approximately 1msec
in flush i2c FIFO polling loop by using usleep_range(1000, 2000):
WARNING: msleep < 20ms can sleep for up to 20ms; see ...
Documentation/timers/timers-howto.txt
+               msleep(1);
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Fix checkpatch.pl CHECK as follows:
CHECK: spinlock_t definition without comment
+       spinlock_t xfer_lock;
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Fix checkpatch.pl alignment and blank line check(s) in i2c-tegra.c
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Remove variable initializations in functions that
are followed by assignments before use
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Clean up macros by:
1) removing unused macros
2) replace constants by macro BIT()
Signed-off-by: NBitan Biswas <bbiswas@nvidia.com>
Reviewed-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Currently we only create an I2C bus for the ports listed in the
device-tree for that master. There's no real reason for this since
we can discover the number of ports the master supports by looking
at the port_max field of the status register.

This patch re-works the bus add logic so that we always create buses
for each port, unless the bus is marked as unavailable in the DT. This
is useful since it ensures that all the buses provided by the CFAM I2C
master are accessible to debug tools.
Signed-off-by: NOliver O'Halloran <oohall@gmail.com>
Reviewed-by: NEddie James <eajames@linux.ibm.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Dell platform team told us that some (DMI whitelisted) Dell Latitude
machines have ST microelectronics accelerometer at I2C address 0x29.

Presence of that ST microelectronics accelerometer is verified by existence
of SMO88xx ACPI device which represent that accelerometer. Unfortunately
ACPI device does not specify I2C address.

This patch registers lis3lv02d device for selected Dell Latitude machines
at I2C address 0x29 after detection. And for Dell Vostro V131 machine at
I2C address 0x1d which was manually detected.

Finally commit a7ae8195 ("i2c: i801: Allow ACPI SystemIO OpRegion to
conflict with PCI BAR") allowed to use i2c-i801 driver on Dell machines so
lis3lv02d correctly initialize accelerometer.

Tested on Dell Latitude E6440.
Signed-off-by: NPali Rohár <pali.rohar@gmail.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Cypress USB Type-C CCGx controller firmware version 3.1.10
(which is being used in many NVIDIA GPU cards) has known issue of
not triggering interrupt when a USB device is hot plugged to runtime
resume the controller. If any GPU card gets latest kernel with runtime
pm support but does not get latest fixed firmware then also it should
continue to work and therefore a workaround is required to check for
any connector change event.

The workaround is that i2c bus driver will call pm_request_resume()
to runtime resume ucsi_ccg driver. CCG driver will call the ISR
for any connector change event for NVIDIA GPU card and only if it has
old CCG firmware with the known issue.
Signed-off-by: NAjay Gupta <ajayg@nvidia.com>
Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Cypress USB Type-C CCGx controller firmware version 3.1.10
(which is being used in many NVIDIA GPU cards) has known issue of
not triggering interrupt when a USB device is hot plugged to runtime
resume the controller. If any GPU card gets latest kernel with runtime
pm support but does not get latest fixed firmware then also it should
continue to work and therefore a workaround is required to check for
any connector change event

The workaround is to request runtime resume of i2c client
which is UCSI Cypress CCGx driver. CCG driver will call the ISR
for any connector change event only if NVIDIA GPU has old
CCG firmware with the known issue.
Signed-off-by: NAjay Gupta <ajayg@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The change enables runtime pm support to UCSI CCG driver.
Added ucsi_resume() function to enable notification after
system reusme. Exported both ucsi_resume() and ucsi_send_command()
symbols in ucsi.c for modular build.
Signed-off-by: NAjay Gupta <ajayg@nvidia.com>
Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Enable runtime pm support with autosuspend delay of three second.
This is to make sure I2C client device Cypress CCGx has completed
all transaction.
Signed-off-by: NAjay Gupta <ajayg@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Added a local variable "send_stop" to simplify "goto" statements.

The "send_stop" handles below two case
1) When first i2c start fails and so i2c stop is not sent before
exiting

2) When i2c stop failed after all transfers and we do not need to
send another stop before exiting.
Signed-off-by: NAjay Gupta <ajayg@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This allows drivers to lookup i2c adapters on ACPI based systems similar to
of_get_i2c_adapter_by_node() with DT based systems.
Signed-off-by: NRuslan Babayev <ruslan@babayev.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Depending on MACH_JZ4780 prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>