CONFIG_68328_SERIAL_UART2 doesn't exist in Kconfig, therefore removing
all references to it from the source.
Signed-off-by: NChristian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

CONFIG_RAM_{16,32}_MB doesn't exist in Kconfig, therefore removing
all references to it from the source.
Signed-off-by: NChristian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

CONFIG_RELOCATE doesn't exist in Kconfig, therefore removing
all references to it from the source.
Signed-off-by: NChristian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Checkpatch cleanup
Signed-off-by: NAndrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire based NETtel boards use the SMC9196 ethernet devices.
Switch to using a platform setup for these parts using the smc91x driver.
The init code is taken strait out of arch/m68k/include/asm/mcfsmc.h,
just cleaned up a bit.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The Freescale M5249EVB board is fitted with an SMC LAN91c11 ethernet
device. Add platform support to the M5249EVB setup code to support this.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Since Grant has added the coldfire-qspi driver to next-spi, here is the
platform support for the parts that have qspi hardware.  This sets up
gpio to do the spi chip select using the default chip select pins; it should
be trivial for boards that require different or additional spi chip selects to
use other gpios as needed.
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Remove a duplicate vector setting line for the 68360 interrupt
setup. Pointed out by Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Signed-off-by: NDenys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

The m68knommu coldfire pit clocksource looks like it was incorrectly
marked as a continuous clocksource.  Running with it marked as a
continuous clocksource could cause hangs when the system switches to
highres mode or enables nohz.

This patch removes the CLOCK_SOURCE_IS_CONTINUOUS flag on the coldfire pit
clocksource.  This will disallow systems using this clocksource from
entering oneshot mode (disabling highres timers and nohz).
Signed-off-by: NJohn Stultz <johnstul@us.ibm.com>
Acked-by: NGreg Ungerer <gerg@snapgear.com>
Cc: Steven King <sfking@fdwdc.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

export the clk_*  stubs defined in arch/m68knommu/platform/coldfire/clk.c so
they can be used by modules.
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@goober.(none)>

This patch adds m68knommu support for getting the kernel command line
arguments from uboot, including the passing of an initrd image from uboot.

We use this on a 5270/5271 based board, and have used it on the 5271evb
development board.  It is based on a patch found in the linux-2.6-denx
git tree, although that tree seems to have had lots of other changes
since which are not in the main Linus kernel.  I believe this will work
on all coldfires, although other m68knommu might be missing the _init_sp
stuff in head.S as far as I can tell.  I only have the coldfire to
test on.
Signed-off-by: NLennart Sorensen <lsorense@csclub.uwaterloo.ca>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Pin 0 of the EPORT is not connected on the 523x, 5271, 5275 and 528x and the
TIMER on the 523x has 8 pins, not 4.
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Commit f159ee78 ("locking,
m68k/asm-offsets: Rename pt_regs offset defines") breaks the
m68knommu entry code that relies on these define names.
Fix the files to match the new define names.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ethernet pins on the 532x ColdFire CPU family are multi-function
pins. We need to enable them as ethernet pins when using the FEC
ethernet driver.

Bug report, and older patch, from timothee@manaud.net.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Now that the ColdFire 5272 has full interrupt controller functionality
we can remove all the interrupt masking and acking code from the FEC
ethernet driver.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire 5272 CPU has a very different interrupt controller than
any of the other ColdFire parts. It needs its own controller code to
correctly setup and ack interrupts.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire 5249 CPU has a second (compleletly different) interrupt
controller. It is the only ColdFire CPU that has this type. It controlls
GPIO interrupts amongst a number of interrupts from other internal
peripherals. Add support code for it.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The recent changes to the old ColdFire interrupt controller code means
we no longer need to manually unmask the timer interrupt. That is now
done in the interrupt controller code proper.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The older simple ColdFire interrupt controller has no one-to-one mapping
of interrupt numbers to bits in the interrupt mask register. Create a
mapping array that each ColdFire CPU type can populate with its available
interrupts and the bits that each use in the interrupt mask register.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The newer ColdFire 532x family of CPU's uses the old timer, but has a
newer interrupt controller. It doesn't need the special timer setup
that was required when using the older interrupt controller. Remove the
dead timer irq and level setting code, and define the hard coded vector.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire "timers" clock setup can be simplified. There is really no
need for the flexible per-platform setup code. The clock interrupt can be
hard defined per CPU platform (in CPU include files). This makes the
actual timer code simpler.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The external interrupts used on the old Coldfire parts with the old style
interrupt controller can be properly mask/unmasked in the interrupt
handling code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Each of the ColdFire CPU platform code that used the old style interrupt
controller had its own copy of the mcf_autovector() function. They are all
the same, remove them all and create a single function in the common
coldfire/intc.c code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire intc-simr interrupt controller should mask off all
interrupt sources at init time. Doing it here instead of separately
in each platform setup.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With fully implemented interrupt controller code we don't need to do
the custom interrupt setup for the timer device of the ColdFire 532x.
Remove that code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With proper interrupt controller code in place there is no need for
devices like the timers to have custom interrupt masking code.
Remove it (and the defines that go along with it).
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The new code for the interrupt controller in the ColdFire 520x takes
care of all the interrupt controller setup. No manual config of the
level registers (ICR) is required by the  platform device setup code.
So remove it.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Define the interrupt controller structures along with the interrupt
controller code for the 68360 CPU. This brings the interrupt setup
and control into one place for this CPU family.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Define the interrupt controller structures along with the interrupt
controller code for the 68328 CPU family. This brings the interrupt
setup and control into one place for this CPU family.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple
interrupt controller. Use common setup code for them. This addition
means that all ColdFire CPU's now have some specific type of interrupt
controller code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With the common intc-simr interrupt controller code in place the ColdFire
532x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire 532x family of parts uses 2 of the same INTC interrupt
controlers used in the ColdFire 520x family. So modify the code to
support both parts. The extra code for the second INTC controler in
the case of the 520x is easily optimized away to nothing.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With the common intc-2 interrupt controller code in place the ColdFire
523x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With the common intc-2 interrupt controller code in place the ColdFire
528x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Create general interrupt controller code for the many ColdFire version 2
cores that use the two region INTC interrupt controller. This includes the
523x family, 5270, 5271, 5274, 5275, and the 528x families.

This code does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With general interrupt controller code in place we don't need specific
unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC).
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>