1. 15 3月, 2015 1 次提交
    • M
      ARM: omap: convert wakeupgen to stacked domains · 7136d457
      Marc Zyngier 提交于
      OMAP4/5 has been (ab)using the gic_arch_extn to provide
      wakeup from suspend, and it makes a lot of sense to convert
      this code to use stacked domains instead.
      
      This patch does just this, updating the DT files to actually
      reflect what the HW provides.
      
      BIG FAT WARNING: because the DTs were so far lying by not
      exposing the WUGEN HW block, kernels with this patch applied
      won't have any suspend-resume facility when booted with old DTs,
      and old kernels with updated DTs won't even boot.
      
      On a platform with this patch applied, the system looks like
      this:
      
      root@bacon-fat:~# cat /proc/interrupts
                  CPU0       CPU1
       16:          0          0     WUGEN  37  gp_timer
       19:     233799     155916       GIC  27  arch_timer
       23:          0          0     WUGEN   9  l3-dbg-irq
       24:          1          0     WUGEN  10  l3-app-irq
       27:        282          0     WUGEN  13  omap-dma-engine
       44:          0          0  4ae10000.gpio  13  DMA
      294:          0          0     WUGEN  20  gpmc
      297:        506          0     WUGEN  56  48070000.i2c
      298:          0          0     WUGEN  57  48072000.i2c
      299:          0          0     WUGEN  61  48060000.i2c
      300:          0          0     WUGEN  62  4807a000.i2c
      301:          8          0     WUGEN  60  4807c000.i2c
      308:       2439          0     WUGEN  74  OMAP UART2
      312:        362          0     WUGEN  83  mmc2
      313:        502          0     WUGEN  86  mmc0
      314:         13          0     WUGEN  94  mmc1
      350:          0          0      PRCM  pinctrl, pinctrl
      406:   35155709          0       GIC 109  ehci_hcd:usb1
      407:          0          0     WUGEN   7  palmas
      409:          0          0     WUGEN 119  twl6040
      410:          0          0   twl6040   5  twl6040_irq_ready
      411:          0          0   twl6040   0  twl6040_irq_th
      IPI0:          0          1  CPU wakeup interrupts
      IPI1:          0          0  Timer broadcast interrupts
      IPI2:      95334     902334  Rescheduling interrupts
      IPI3:          0          0  Function call interrupts
      IPI4:        479        648  Single function call interrupts
      IPI5:          0          0  CPU stop interrupts
      IPI6:          0          0  IRQ work interrupts
      IPI7:          0          0  completion interrupts
      Err:          0
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
      7136d457
  2. 20 11月, 2014 1 次提交
  3. 11 11月, 2014 1 次提交
  4. 19 9月, 2014 2 次提交
  5. 12 9月, 2014 1 次提交
    • S
      ARM: dts: OMAP2+: Add sub mailboxes device node information · d27704d1
      Suman Anna 提交于
      The sub-mailbox devices are added to the Mailbox DT nodes on
      OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5
      family of SoCs. This data represents the same mailboxes that
      used to be represented in hwmod attribute data previously.
      The node name is chosen based on the .name field of
      omap_mbox_dev_info structure used in the hwmod data.
      
      Cc: "Benoît Cousson" <bcousson@baylibre.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Pawel Moll <pawel.moll@arm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
      Cc: Kumar Gala <galak@codeaurora.org>
      Signed-off-by: NSuman Anna <s-anna@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d27704d1
  6. 09 9月, 2014 1 次提交
  7. 15 7月, 2014 1 次提交
  8. 03 6月, 2014 1 次提交
  9. 23 5月, 2014 1 次提交
  10. 15 5月, 2014 1 次提交
  11. 07 5月, 2014 1 次提交
    • T
      ARM: dts: Fix omap serial wake-up when booted with device tree · 31f0820a
      Tony Lindgren 提交于
      We've had deeper idle states working on omaps for few years now,
      but only in the legacy mode. When booted with device tree, the
      wake-up events did not have a chance to work until commit
      3e6cee17 (pinctrl: single: Add support for wake-up interrupts)
      that recently got merged. In addition to that we also needed commit
      79d97015 (of/irq: create interrupts-extended property) and
      9ec36caf (of/irq: do irq resolution in platform_get_irq) that
      are now also merged.
      
      So let's fix the wake-up events for some selected omaps so devices
      booted in device tree mode won't just hang if deeper power states
      are enabled, and so systems can wake up from suspend to the serial
      port event.
      
      Note that there's no longer need to specify the wake-up bit in
      the pinctrl settings, the request_irq on the wake-up pin takes
      care of that.
      
      Cc: devicetree@vger.kernel.org
      Cc: "Benoît Cousson" <bcousson@baylibre.com>
      Cc: Kevin Hilman <khilman@linaro.org>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      [tony@atomide.com: updated comments, added board LDP]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      31f0820a
  12. 19 4月, 2014 2 次提交
  13. 19 3月, 2014 1 次提交
  14. 14 3月, 2014 2 次提交
  15. 13 3月, 2014 1 次提交
  16. 06 3月, 2014 1 次提交
  17. 05 3月, 2014 2 次提交
  18. 03 3月, 2014 1 次提交
  19. 01 3月, 2014 3 次提交
  20. 18 1月, 2014 1 次提交
  21. 30 10月, 2013 1 次提交
  22. 22 10月, 2013 1 次提交
    • N
      ARM: dts: OMAP3+: Add i2c aliases · 20b80942
      Nishanth Menon 提交于
      Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl
      dependencies. This changes the i2c ID each bus is registered with in
      i2c-dev interface. As a result of this, many userspace tools break and
      there is no consistent manner to fix the same if the i2c dev interface
      have no consistent numbering.
      
      Since this could happen for other OMAP derivatives, provide i2c alias
      for all OMAP3+ SoCs to allow ordering the i2c devices correctly.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
      20b80942
  23. 21 10月, 2013 1 次提交
    • R
      ARM: dts: omap: Add reset/idle on init bindings for OMAP · f12ecbe2
      Rajendra Nayak 提交于
      On OMAP we have co-processor IPs, memory controllers,
      GPIOs which control regulators and power switches to
      PMIC, and SoC internal Bus IPs, some or most of which
      should either not be reset or idled or both at init.
      (In some cases there are erratas which prevent an IP
      from being reset)
      Have a way to pass this information from DT.
      
      Update the am33xx/omap4 and omap5 dtsi files with the
      new bindings for modules which either should not be
      idled. reset or both. A later patch would cleanup the
      same information that exists today as part of the hwmod
      data files.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>
      f12ecbe2
  24. 12 10月, 2013 2 次提交
  25. 11 10月, 2013 1 次提交
  26. 08 10月, 2013 1 次提交
  27. 04 10月, 2013 1 次提交
  28. 28 9月, 2013 1 次提交
  29. 19 6月, 2013 5 次提交