Select the CBS package if SDP4430 is enabled during config.
Use the proper package (CBL or CBS) based on chip revision.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>

Please note that the full muxmodes are re-defined for ES2 instead
of using the subset. There are 81 differences among 204 pins.
The subset fixup will have to iterate over the whole list for each
subset entry, which can lead to an important number of iteration.
On the other hand, it will take much more memory at boot time.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>

Select the CBL package if SDP4430 is enabled during config.
Initialize the mux framework during the board init.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

Add data for OMAP4430 generated from HW pinout & register database.
The data set is split in two partitions for both core and wkup.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

Starting on OMAP4, the pin mux configuration is located in two
different partitions of the control module (CODE_PAD and WKUP_PAD).
The first one is inside the core power domain whereas the second
one is inside the wakeup.
- Add the capability to add any number of partition during board init
time depending of Soc partitioning.
- Add some init flags as well in order to avoid explicit Soc version
check inside the mux core code.
- Add a comment with mux0 mode on top of omap_mux/board/<partition>
if the current mux mode is not the default one.

Thanks to Tony Lindgren <tony@atomide.com> for the following improvements:
- Add omap_mux_get for getting the partition data so platform level
device code can use it.
- Fix the rx51 board code to use the new API.
- Do not store the partition for each mux entry. Look up the partition
for debugfs instead.

Thanks to Dan Murphy <dmurphy@ti.com> for testing on OMAP4 and reporting
a couple of bugs.
Thanks to Anand Gadiyar <gadiyar@ti.com> for testing on OMAP3 zoom and
bug report.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Tested-by: NMurphy Dan <dmurphy@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>

Replace all the printk(KERN_XXX... with pr_xxx macros.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

This patch fixes the following error:

>regulator: VMMC1: 1850 <--> 3150 mV at 3000 mV normal standby
>twl_reg twl_reg.6: can't register VMMC1, -22
>twl_reg: probe of twl_reg.6 failed with error -22
Signed-off-by: NThomas Weber <weber@corscience.de>
Signed-off-by: NTony Lindgren <tony@atomide.com>

For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030. This functionality was introduced in mfd tree on
track to kernel.org

Sync pandaboard to the same and make mmc work.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: NKishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Tested-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NMadhusudhan Chikkature <madhu.cr@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Adding card detect callback function and card detect configuration
function for MMC1 Controller on OMAP4.

Card detect configuration function does initial configuration of the
MMC Control & PullUp-PullDown registers of Phoenix.

For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030.

Since OMAP4 doesn't use any GPIO line as used in OMAP3 for card detect,
the suspend/resume initialization which was done in omap_hsmmc_gpio_init
previously is moved to the probe thus making it generic for both OMAP3 &
OMAP4.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The machine_kexec() calls outer_disable which can crash on OMAP4
becasue of trustzone restrictions.

This patch overrides the default l2x0_disable with a OMAP4
specific implementation taking care of trustzone
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NTony Lindgren <tony@atomide.com>
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>

Commit ab69bcd6 (arm: remove
machine_desc.io_pg_offst and .phys_io) could not update
the new boards in the omap tree. This causes the build of
omap2plus_defconfig to fail. Fix this.
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Eric Miao <eric.miao at canonical.com>
[tony@atomide.com: updated description]
Signed-off-by: NTony Lindgren <tony@atomide.com>

On OMAP24xx, UART2 WKEN and WKST registers are in PM_WKEN2_CORE and
PM_WKST2_CORE respecitvely.  Fix the OMAP2 register init to use the
correct registers on OMAP24xx.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM35x has musb interface (version 1.8) and uses CPPI41 DMA engine.
It has USB phy built inside the IP itself.
Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>

The omap2plus_defconfig doesn't boot up when built with CONFIG_PM
disabled on the latest linux-omap master. Below are the observations
1. OMAP3 reboots in the middle of boot
--------------------------------------------------
[    0.000000] Calibrating delay loop... 494.72 BogoMIPS (lpj=1933312)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.000000] Security Framework initialized
[    0.000000] Mount-cache hash table entries: 512
[    0.000000] CPU: Testing write buffer coherency: ok
[    0.000000] Brought up 1 CPUs
[    0.000000] SMP: Total of 1 processors activated (494.72 BogoMIPS).
[    0.000000] regulator: core version 0.5
[    0.000000] NET: Registered protocol family 16

U-Boot 1.1.4 (Feb 11 2009 - 16:10:23)

OMAP3430-GP rev 2, CPU-OPP2 L3-165MHz
TI 3430SDP 1.0 Version + mDDR (Boot NOR)
DRAM:  128 MB
Flash: 128 MB
NAND:128 MiB
--------------------------------------------------

2. OMAP4 does a kernel PANIC
-------------------------------------
[    0.000000] Calibrating delay loop... 1195.29 BogoMIPS (lpj=4669440)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.000000] Security Framework initialized
[    0.000000] Mount-cache hash table entries: 512
[    0.000000] CPU: Testing write buffer coherency: ok
[    0.000000] L310 cache controller enabled
[    0.000000] l2x0: 16 ways, CACHE_ID 0x410000c2, AUX_CTRL 0x0e050000
[    0.000000] CPU1: Booted secondary processor
[    0.000000] Brought up 2 CPUs
[    0.000000] SMP: Total of 2 processors activated (2395.78 BogoMIPS).
[    0.000000] regulator: core version 0.5
[    0.000000] NET: Registered protocol family 16
[    0.000000] mux: Could not set signal i2c2_scl.i2c2_scl
[    0.000000] mux: Could not set signal i2c2_sda.i2c2_sda
[    0.000000] mux: Could not set signal i2c3_scl.i2c3_scl
[    0.000000] mux: Could not set signal i2c3_sda.i2c3_sda
[    0.000000] mux: Could not set signal i2c4_scl.i2c4_scl
[    0.000000] mux: Could not set signal i2c4_sda.i2c4_sda
-------------------------------------

This is happening because 'omap_serial_init()' is hanging in the boot.
On OMAP3 the watchdog is generating reboot because devices_init doesn't
happens where as on OMAP4 it just hangs without reboot.
The uart clock is not getting enabled after omap_device_idle as part
of omap_serial_init.
The omap_device_idle(will disable the clock) then omap_uart_block_sleep()
should enable clock back disabled during the boot up phase.
But omap_uart_block_sleep() stuffed version is binded only under
CONFIG_PM and other version is just empty. Hence it is not enabling
clock back as expected

This patch adds uart clock enable code to omap_uart_block_sleep() function
built with CONFIG_PM disabled.
Thanks to Charulatha and Govindraj for their help on this debug.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NCharulatha V <charu@ti.com>
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix
incorrect assignment warnings) changed a pointer from 'u32 *' to
'void *' without also fixing up the pointer arithmetic.

Fix the scratchpad offsets so they are byte offsets instead of
word offsets and thus work correctly with a void pointer base.

Special thanks to Jean Pihet for taking the time track down this
problem and propose an initial solution.

Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm.

Cc: Manjunath Kondaiah G <manjugk@ti.com>
Reported-by: NJean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Tested-by: NJean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The OMAP4 PandaBoard has EHCI port1 hooked up to an external
SMSC3320 transciever. GPIO 1 is used to power on the transceiver
and GPIO 62 for reset on the transceiver.
Signed-off-by: NDavid Anders <x0132446@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Avoid possible crash if CONFIG_MMC_OMAP_HS is not set.
Signed-off-by: NDavid Anders <x0132446@ti.com>
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

remove the second hsmmc definition as it is only used on the
expansion header of the PandaBoard and can be mux for other
functions.
Signed-off-by: NDavid Anders <x0132446@ti.com>
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

It seems these comments where accidentally added so remove them.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>

Fix bit clear. Now it clears all other bits than mask bit where it should
clear only it.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>

Reduce the amount of debugging generated by default when unused clocks
are being disabled by the clock code.  The previous code would only
generate debug-level messages, but some people who wished to run
production kernels with debug-level messages enabled reported that the
large number of clock disable messages were slowing boot.  Now to
enable clock-by-clock disable messages, DEBUG needs to be defined in
mach-omap2/clock.c.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tuukka Tikkanen <tuukka.tikkanen@nokia.com>
Cc: Tim Bird <tim.bird@am.sony.com>

Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap.  This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.

In response, move the SCM headers into mach-omap2/.

As part of this, remove the direct SCM access from the OMAP UDC
driver.  It was clearly broken.  The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>

Split plat-omap/common.c into three pieces:

1. the 32KiHz sync timer and clocksource code, which now lives in
   plat-omap/counter_32k.c;

2. the OMAP2+ common code, which has been moved to mach-omap2/common.c;

3. and the remainder of the OMAP-wide common code, which includes the
   deprecated ATAGs code and a deprecated video RAM reservation function.

The primary motivation for doing this is to move the OMAP2+-specific parts
into an OMAP2+-specific file, so that build breakage related to the
System Control Module code can be resolved.

Benoît Cousson <b-cousson@ti.com> suggested a new filename and found
some bugs in the counter_32k.c comments - thanks Benoît.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>

Previously the OMAP McBSP ASoC driver implemented CLKS switching by
using omap_ctrl_{read,write}l() directly.  This is against policy; the OMAP
System Control Module functions are not intended to be exported to drivers.
These symbols are no longer exported, so as a result, the OMAP McBSP ASoC
driver does not build as a module.

Resolve the CLKS clock changing portion of this problem by creating a
clock parent changing function that lives in
arch/arm/mach-omap2/mcbsp.c, and modify the ASoC driver to use it.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, this symbol must be exported for use by
sound/soc/omap/omap-mcbsp.c.

Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/* and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are.  These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversions.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Acked-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via
direct System Control Module writes on OMAP2+.  This required the
omap_ctrl_{read,write}l() functions to be exported, which is against
policy: the only code that should call those functions directly is
OMAP core code, not device drivers.  omap_ctrl_{read,write}*() are no
longer exported, so the driver no longer builds as a module.

Fix the pinmuxing part of the problem by removing calls to
omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and
implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, these symbols must be exported for use by
sound/soc/omap/omap-mcbsp.c.

Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are.  These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversion.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Acked-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The OMAP3 clock tree already contains the infrastructure to support
clock framework-based McBSP functional clock source switching.  But it
did not contain the clkdev aliases for the McBSP code to refer to the
parent clocks in an SoC integration-neutral way.  So, add the clkdev
aliases for the parent clocks.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSPs 1-5.  Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSP 1 and 2.  Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Currently, if, for example, CONFIG_ARCH_OMAP2420 is not selected, OMAP2420
board files can still be included in the build.  This results in link errors:

arch/arm/mach-omap2/built-in.o: In function `omap_generic_map_io':
.../arch/arm/mach-omap2/board-generic.c:51: undefined reference to `omap2_set_globals_242x'
arch/arm/mach-omap2/built-in.o: In function `omap_h4_init':
.../arch/arm/mach-omap2/board-h4.c:330: undefined reference to `omap2420_mux_init'
arch/arm/mach-omap2/built-in.o: In function `omap_h4_map_io':
.../arch/arm/mach-omap2/board-h4.c:373: undefined reference to `omap2_set_globals_242x'
arch/arm/mach-omap2/built-in.o: In function `omap_apollon_init':
.../arch/arm/mach-omap2/board-apollon.c:325: undefined reference to `omap2420_mux_init'
arch/arm/mach-omap2/built-in.o: In function `omap_apollon_map_io':
.../arch/arm/mach-omap2/board-apollon.c:353: undefined reference to `omap2_set_globals_242x'
make: *** [.tmp_vmlinux1] Error 1

Fix this by making the boards depend on the Kconfig option for the
specific SoC that they use.

Also, while here, fix the mach-omap2/board-generic.c file to remove the
dependency on OMAP2420.

Charulatha Varadarajan <charu@ti.com> caught a typo - thanks Charu.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Charulatha Varadarajan <charu@ti.com>

As is done on OMAP3, check omap_uart_can_sleep() as one of the
pre-conditions for entering the idle loop.  Without this check,
entering idle introduces large latencies on active UARTs, and is
especially noticable on serial console.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some modules which have 16bit registers can cause imprecise
aborts if a __raw_readl/writel is used to read/write 32 bits.

Add an additional flag to identify modules which have such
hard requirement, and handle it in the hwmod framework.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove duplicated include.
Signed-off-by: NNicolas Kaiser <nikai@nikai.net>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Inorder to avoid any assumptions from bootloader, the watchdog
timer module is reset during init. This enables the watchdog
timer.

Therefore, it is required to disable WDT after it is reset
during init. Otherwise the system would reboot as per the default
watchdog timer registers settings.

Later, when the watchdog driver is loaded, the watchdog timer settings
is adjusted as per the default timer_margin set in the driver and the
driver would supports the normal operations supported by OMAP watchdog
timer.
Signed-off-by: NCharulatha V <charu@ti.com>
Reported-by: NKevin Hilman <khilman@deeprootsystems.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

VMMC2 regulator is configured but it's not used for the IGEP v2, so
remove this regulator from board.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add i2c eeprom driver to access monitor EDID binary information
from user space, something that is required by 'decode-edid' and
'parse-edid'.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some GPIO's used by WLAN-BT combo on IGEP v2 depends on hardware
revision. This patch handles these GPIO's.

  ----------------------------------------------------------
 |       Hw Rev.       | WIFI_NPD | WIFI_NRESET | BT_NRESET |
  ----------------------------------------------------------
 |  B                  | gpio94  |   gpio95    |     -      |
 |  B/C (B-compatible) | gpio94  |   gpio95    |  gpio137   |
 |  C                  | gpio138 |   gpio139   |  gpio137   |
  ----------------------------------------------------------
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

There are currently two versions of IGEP v2 board, this patch introduces a
function to detect the hardware revision of IGEP board.

  --------------------------
 | Id. | Hw Rev. | GPIO 28  |
  --------------------------
 |  0  |   B/C   |   high   |
 |  1  |   C     |   low    |
  --------------------------
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The IGEP v2 board has four leds, this patch allows control all
of these LEDs using the LED class if CONFIG_LEDS_GPIO is selected
or using the General Purpose Input/Output (GPIO) interface if
CONFIG_LEDS_GPIO is not selected.
Signed-off-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>