- 30 10月, 2015 7 次提交
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由 Christian König 提交于
Just move the remaining users to fence_put/get. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Stop using the driver internal functions. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Instead of coding the check ourself. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
v2: add missing NULL check. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Going to need that elsewhere as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
No need to duplicate the functionality any more. v2: fix handling if no fence is available. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
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由 Christian König 提交于
amdgpu_fence_default_wait isn't needed any more the default wait does the same thing and amdgpu_test_signaled is dead as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 10月, 2015 1 次提交
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由 Alex Deucher 提交于
Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 24 10月, 2015 3 次提交
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由 Alex Deucher 提交于
Taking the grph update lock is only necessary when updating the the secondary address (for single pipe stereo). Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Taking the grph update lock is only necessary when updating the the secondary address (for single pipe stereo). Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Taking the grph update lock is only necessary when updating the the secondary address (for single pipe stereo). Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 10月, 2015 11 次提交
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由 Christian König 提交于
That's still small enough to not waste to much memory on PD/PTs. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Add core VI enablement for Stoney. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is VCE 3.x single. v2: Stoney is single pipe like Fiji Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is UVD 6.x. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is GFX 8.1. v2: update to latest golden settings Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is SDMA 3.x. v2: update to latest golden register settings Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is DCE 11.x. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is SMC 8.x. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is GMC 8.x. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Samuel Li 提交于
Stoney is based on Carrizo with some IP upgrades. Signed-off-by: NSamuel Li <samuel.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 10月, 2015 4 次提交
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由 Chunming Zhou 提交于
fix the vm->mutex and ww_mutex confilcts. vm->mutex is always token first, then ww_mutex. V2: remove unneccessary checking for pt bo. Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743 Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Finally getting rid of it. Signed-off-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
It didn't worked to well anyway. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com>
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- 20 10月, 2015 1 次提交
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由 Alex Deucher 提交于
We were basically opencoding the same thing in both hw_init and resume and hw_fini and suspend. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 10月, 2015 1 次提交
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由 Alex Deucher 提交于
This is the recommended setting from the hw team for newer versions of the firmware. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 15 10月, 2015 12 次提交
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由 Junwei Zhang 提交于
Change-Id: I67e987db0efdca28faa80b332b75571192130d33 Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NDavid Zhou <david1.zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Output all VM mappings a command submission uses. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This makes it much easier to find when userspace misses to send some buffers. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Port of radeon commit 9b7d786b. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lukas Wunner 提交于
This was added to two radeon files even though they don't use any vga_switcheroo symbols, the amdgpu fork inherited them: Added to amdgpu_acpi.c by commit d7a2952f ("drm/radeon: Add support for the ATIF ACPI method to the radeon driver"). Added to amdgpu_bios.c by commit 6a9ee8af ("vga_switcheroo: initial implementation (v15)"). Signed-off-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check to make sure we aren't touching a non-existent display controller and simplify the code. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Rework the sdma structures in the driver to consolidate all of the sdma info into a single structure and allow for asics that may have different numbers of sdma instances. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Everything is evicted from VRAM before suspend, so we need to make sure all BOs are unpinned and re-pinned after resume. Fixes broken mouse cursor after resume introduced by commit b9729b17. Port of radeon commit: f3cbb17bReviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Port of radeon commit: 8991668aReviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce8 set_cursor. This fixes dce8 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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